tree 3aa2507ec86ff7d9b65038faa3926246c9954126
parent a5c961d1f3a9ab5ba0e5706e866192f8108143fe
author Paulo Zanoni <paulo.r.zanoni@intel.com> 1351024196 -0200
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1351239886 +0200

drm/i915: convert PIPE_CLK_SEL to transcoder

This register appeared in Haswell. It does not have an EDP version
because the EDP transcoder is always tied to the DDIA clock. Notice
that if we call PIPE_CLK_SEL(pipe) when pipe is PIPE_A and transcoder
is TRANSCODER_EDP we might introduce a bug, that's why this is a
transcoder register even though it does not have an EDP version.

Even though Haswell names this register PIPE_CLK_SEL, it will be
renamed to TRANS_CLK_SEL in the future, so let's just start using the
real name that makes more sense and avoids misusage.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>