drm/i915: Use DP_LINK_RATE_SET whenever possible
Drop the gen9 checks from the code and issue DP_LINK_RATE_SET whenever
the sink reports to support it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 5d8ec3a..aa3c678 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1371,14 +1371,15 @@
intel_dp->lane_count = lane_count;
- intel_dp->link_bw =
- drm_dp_link_rate_to_bw_code(supported_rates[clock]);
-
- if (INTEL_INFO(dev)->gen >= 9 && intel_dp->supported_rates[0]) {
+ if (intel_dp->num_supported_rates) {
+ intel_dp->link_bw = 0;
intel_dp->rate_select =
rate_to_index(supported_rates[clock],
intel_dp->supported_rates);
- intel_dp->link_bw = 0;
+ } else {
+ intel_dp->link_bw =
+ drm_dp_link_rate_to_bw_code(supported_rates[clock]);
+ intel_dp->rate_select = 0;
}
pipe_config->pipe_bpp = bpp;
@@ -3492,7 +3493,7 @@
if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
link_config[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config, 2);
- if (INTEL_INFO(dev)->gen >= 9 && intel_dp->supported_rates[0])
+ if (intel_dp->num_supported_rates)
drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_RATE_SET,
&intel_dp->rate_select, 1);