tree e92592418e40085b2b3363ed15b520a744df4634
parent 96b4026878d9dac71bd4c3d6e05c7fbb16a3e0aa
author Paulo Zanoni <paulo.r.zanoni@intel.com> 1386963998 -0200
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1386966897 +0100

drm/i915: get a PC8 reference when enabling the power well

In the current code, at haswell_modeset_global_resources, first we
decide if we want to enable/disable the power well, then we decide if
we want to enable/disable PC8. On the case where we're enabling PC8
this works fine, but on the case where we disable PC8 due to a non-eDP
monitor being enabled, we first enable the power well and then disable
PC8. Although wrong, this doesn't seem to be causing any problems now,
and we don't even see anything in dmesg. But the patches for runtime
D3 turn this problem into a real bug, so we need to fix it.

This fixes the "modeset-non-lpsp" subtest from the "pm_pc8" test from
intel-gpu-tools.

v2: - Rebase (i915_disable_power_well).
v3: - More reabase.
v4: - Rebase on top of -fixes instead of -nightly.

This is commit d62292c8f778772d1b6ec125d461c8c16fdc0417 in -next, but
we need it in -fixes to address Dave's report.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reported-by: Dave Jones <davej@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>