| Qualcomm Technologies, Inc. G-link SMEM Native Transport |
| |
| Required properties: |
| -compatible : should be "qcom,glink-smem-native-xprt" |
| -reg : the location and size of shared memory |
| the irq register base address for triggering interrupts |
| -reg-names : "smem" - string to identify the shared memory region |
| "irq-reg-base" - string to identify the irq register region |
| -qcom,irq-mask : the bitmark to trigger an interrupt |
| -interrupts : the receiving interrupt line |
| -label : the name of the subsystem this link connects to |
| |
| Optional properties: |
| -cpu-affinity: Cores to pin the interrupt and receiving work thread to. |
| -qcom,qos-config: Reference to the qos configuration elements.It depends on |
| ramp-time. |
| -qcom,ramp-time: Worst case time in microseconds to transition to this power |
| state. Power states are numbered by array index position. |
| |
| Example: |
| |
| qcom,glink-smem-native-xprt-modem@fa00000 { |
| compatible = "qcom,glink-smem-native-xprt"; |
| reg = <0xfa00000 0x200000>, |
| <0xfa006008 0x4>; |
| reg-names = "smem", "irq-reg-base"; |
| qcom,irq-mask = <0x1000>; |
| interrupts = <0 25 1>; |
| label = "mpss"; |
| }; |
| |
| qcom,glink-smem-native-xprt-adsp@fa00000 { |
| compatible = "qcom,glink-smem-native-xprt"; |
| reg = <0xfa00000 0x200000>, |
| <0xfa006008 0x4>; |
| reg-names = "smem", "irq-reg-base"; |
| qcom,irq-mask = <0x1000>; |
| interrupts = <0 25 1>; |
| label = "lpass"; |
| cpu-affinity = <1 2>; |
| qcom,qos-config = <&glink_qos_adsp>; |
| qcom,ramp-time = <0x10>, |
| <0x20>, |
| <0x30>, |
| <0x40>; |
| }; |
| |
| glink_qos_adsp: qcom,glink-qos-config-adsp { |
| compatible = "qcom,glink-qos-config"; |
| qcom,flow-info = <0x80 0x0>, |
| <0x70 0x1>, |
| <0x60 0x2>, |
| <0x50 0x3>; |
| qcom,mtu-size = <0x800>; |
| qcom,tput-stats-cycle = <0xa>; |
| }; |