| commit | c0db2ea4e366c94dd3f880928c02534156e3d1b9 | [log] [tgz] |
|---|---|---|
| author | Juergen Beisert <j.beisert@pengutronix.de> | Sat Jul 05 10:02:47 2008 +0200 |
| committer | Robert Schwebel <r.schwebel@pengutronix.de> | Sat Jul 05 10:02:47 2008 +0200 |
| tree | e8486fedc9d405b2867c3a474ebc18fad394836c | |
| parent | 38a41fdf94c449c165213e4665c3f8a0d30f8aba [diff] |
MXC family: Add clock handling Internal clock path handling for the mxc CPUs. Changed against the original Freescale code (and against clocklib for example): - clock rate is always calculated whenever one ask for the current rate (means struct clk has no more a member called "rate"). So switching the PLL base frequency will propagate immediately to all other clocks that are depending on this frequency. Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>