tree 5a0ff082594493ca0a296257b971758fcdd298e7
parent 3484457fc5fcdb650e03d375f1f6e66db93d6109
author Jarkko Nikula <jhnikula@gmail.com> 1284117809 +0300
committer Liam Girdwood <lrg@slimlogic.co.uk> 1284192200 +0100

ASoC: tlv320aic3x: Optimize PLL programming in aic3x_set_bias_level

There is only need to enable/disable once the PLL when the bias is going
between on, prepare, standby and off states.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>