| commit | e32faa303f7f63bad8f9f04267878d61e0f7e0b5 | [log] [tgz] |
|---|---|---|
| author | Thierry Reding <treding@nvidia.com> | Tue Feb 09 15:52:33 2016 +0100 |
| committer | Bjorn Helgaas <bhelgaas@google.com> | Tue Mar 08 15:42:56 2016 -0600 |
| tree | 61ca8fb5c0001b9d624b71c9271932a3bf656355 | |
| parent | 56e75e2a15d0b28261503d415eb56bb4c2b92be5 [diff] |
PCI: tegra: Remove misleading PHYS_OFFSET BARs are disabled when the size register is 0, so it's misleading to write a base address into the start register. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>