[ARM] 4442/1: OSIRIS: Fix CPLD register definitions
Fix the CPLD register definitions to correctly mirror the
documentation
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 4d6c7a5..4525bb0 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -65,6 +65,11 @@
/* CPLD control registers */
{
+ .virtual = (u32)OSIRIS_VA_CTRL0,
+ .pfn = __phys_to_pfn(OSIRIS_PA_CTRL0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (u32)OSIRIS_VA_CTRL1,
.pfn = __phys_to_pfn(OSIRIS_PA_CTRL1),
.length = SZ_16K,
@@ -74,6 +79,11 @@
.pfn = __phys_to_pfn(OSIRIS_PA_CTRL2),
.length = SZ_16K,
.type = MT_DEVICE,
+ }, {
+ .virtual = (u32)OSIRIS_VA_IDREG,
+ .pfn = __phys_to_pfn(OSIRIS_PA_IDREG),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
},
};
@@ -195,13 +205,13 @@
pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
slot, set, set->nr_map);
- tmp = __raw_readb(OSIRIS_VA_CTRL1);
- tmp &= ~OSIRIS_CTRL1_NANDSEL;
+ tmp = __raw_readb(OSIRIS_VA_CTRL0);
+ tmp &= ~OSIRIS_CTRL0_NANDSEL;
tmp |= slot;
- pr_debug("osiris_nand: ctrl1 now %02x\n", tmp);
+ pr_debug("osiris_nand: ctrl0 now %02x\n", tmp);
- __raw_writeb(tmp, OSIRIS_VA_CTRL1);
+ __raw_writeb(tmp, OSIRIS_VA_CTRL0);
}
static struct s3c2410_platform_nand osiris_nand_info = {