| commit | c50325f7bcb8a3ceaacb9dbc41180b1cbbae7b5e | [log] [tgz] |
|---|---|---|
| author | Chew, Chiau Ee <chiau.ee.chew@intel.com> | Fri Nov 29 02:13:11 2013 +0800 |
| committer | Mark Brown <broonie@linaro.org> | Thu Nov 28 11:23:37 2013 +0000 |
| tree | a1a133a87129f779abad37eaa3861b84f7ddc816 | |
| parent | 54acbd9688e6324470671525c7916011f1ff8081 [diff] |
spi/pxa2xx: Restore private register bits. The Intel LPSS SPI private register bits have to be restored when system resume from S3 suspend. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>