| commit | c6297843829469571639f04d62292d1c75676b20 | [log] [tgz] |
|---|---|---|
| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | Thu Nov 05 10:50:20 2015 -0800 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Wed Nov 18 11:22:34 2015 +0100 |
| tree | 33ddc2f5ca0e28ea64a0b34621af5045da16be37 | |
| parent | d72f9d919a60e5096105237a72f046b7a20fb53f [diff] |
drm/i915: Make Sink crc calculation waiting for counter to reset. According to VESA DP spec TEST_CRC_COUNT (Bits 3:0) at TEST_SINK_MISC (00246h) is "Reset to 0 when TEST_SINK bit 0 = 0; So let's give few vblanks so we are really sure that this counter is really zeroed on the next sink_crc read. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>