ARM: dts: msm: Add DT support for new compute governor
Add new tables to enable the new compute governor.
Change-Id: I964c66037b4d8496683723bacc9c294f3f9a1f49
Signed-off-by: Jonathan Avila <avilaj@codeaurora.org>
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index c4a30bf..e90c30b 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -348,6 +348,32 @@
};
};
+ cpubw_compute: qcom,cpubw-compute {
+ compatible = "qcom,arm-cpu-mon";
+ qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
+ &CPU4 &CPU5 &CPU6 &CPU7 >;
+ qcom,target-dev = <&cpubw>;
+ qcom,core-dev-table =
+ < 652800 1611>,
+ < 1036800 3221>,
+ < 1401600 5859>,
+ < 1689600 6445>,
+ < 1804800 7104>,
+ < 1958400 7104>,
+ < 2208000 7104>;
+ };
+
+ mincpubw_compute: qcom,mincpubw-compute {
+ compatible = "qcom,arm-cpu-mon";
+ qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
+ &CPU4 &CPU5 &CPU6 &CPU7 >;
+ qcom,target-dev = <&mincpubw>;
+ qcom,core-dev-table =
+ < 652800 1611 >,
+ < 1401600 3221 >,
+ < 2208000 5859 >;
+ };
+
qcom,ipc-spinlock@1905000 {
compatible = "qcom,ipc-spinlock-sfpb";
reg = <0x1905000 0x8000>;
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index 0ea3623..0718385 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -2565,6 +2565,67 @@
};
};
+ mincpu0bw: qcom,mincpu0bw {
+ compatible = "qcom,devbw";
+ governor = "powersave";
+ qcom,src-dst-ports = <1 512>;
+ qcom,active-only;
+ qcom,bw-tbl =
+ < MHZ_TO_MBPS( 100, 4) >, /* 381 MB/s */
+ < MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */
+ < MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */
+ < MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */
+ < MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */
+ < MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */
+ < MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */
+ < MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */
+ < MHZ_TO_MBPS(1353, 4) >, /* 5161 MB/s */
+ < MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */
+ < MHZ_TO_MBPS(1804, 4) >; /* 6881 MB/s */
+ };
+
+ mincpu6bw: qcom,mincpu6bw {
+ compatible = "qcom,devbw";
+ governor = "powersave";
+ qcom,src-dst-ports = <1 512>;
+ qcom,active-only;
+ qcom,bw-tbl =
+ < MHZ_TO_MBPS( 100, 4) >, /* 381 MB/s */
+ < MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */
+ < MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */
+ < MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */
+ < MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */
+ < MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */
+ < MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */
+ < MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */
+ < MHZ_TO_MBPS(1353, 4) >, /* 5161 MB/s */
+ < MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */
+ < MHZ_TO_MBPS(1804, 4) >; /* 6881 MB/s */
+ };
+
+ devfreq_compute0: qcom,devfreq-compute0 {
+ compatible = "qcom,arm-cpu-mon";
+ qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>;
+ qcom,target-dev = <&mincpu0bw>;
+ qcom,core-dev-table =
+ < 748800 MHZ_TO_MBPS( 300, 4) >,
+ < 1209660 MHZ_TO_MBPS( 451, 4) >,
+ < 1612800 MHZ_TO_MBPS( 547, 4) >,
+ < 1708000 MHZ_TO_MBPS( 768, 4) >;
+ };
+
+ devfreq_compute6: qcom,devfreq-compute6 {
+ compatible = "qcom,arm-cpu-mon";
+ qcom,cpulist = <&CPU6 &CPU7>;
+ qcom,target-dev = <&mincpu6bw>;
+ qcom,core-dev-table =
+ < 1132800 MHZ_TO_MBPS( 300, 4) >,
+ < 1363200 MHZ_TO_MBPS( 547, 4) >,
+ < 1747200 MHZ_TO_MBPS( 768, 4) >,
+ < 1996800 MHZ_TO_MBPS(1017, 4) >,
+ < 2457600 MHZ_TO_MBPS(1804, 4) >;
+ };
+
cpu_pmu: cpu-pmu {
compatible = "arm,armv8-pmuv3";
qcom,irq-is-percpu;
diff --git a/arch/arm64/boot/dts/qcom/sdm845-v2.dtsi b/arch/arm64/boot/dts/qcom/sdm845-v2.dtsi
index b1bda711..fe149e0 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-v2.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-v2.dtsi
@@ -304,6 +304,12 @@
};
};
+&devfreq_compute {
+ qcom,core-dev-table =
+ < 1881600 MHZ_TO_MBPS(200, 4) >,
+ < 2400000 MHZ_TO_MBPS(1017, 4) >;
+};
+
&clock_gcc {
compatible = "qcom,gcc-sdm845-v2", "syscon";
};
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 86705d6..e3ccb76 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1131,6 +1131,15 @@
};
};
+ devfreq_compute: qcom,devfreq-compute {
+ compatible = "qcom,arm-cpu-mon";
+ qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;
+ qcom,target-dev = <&mincpubw>;
+ qcom,core-dev-table =
+ < 1881600 MHZ_TO_MBPS(200, 4) >,
+ < 2208000 MHZ_TO_MBPS(681, 4) >;
+ };
+
clock_rpmh: qcom,rpmhclk {
compatible = "qcom,rpmh-clk-sdm845";
#clock-cells = <1>;