| commit | c8dd5110dead436b178bb2d8976290fd5f77a2ee | [log] [tgz] |
|---|---|---|
| author | Boojin Kim <boojin.kim@samsung.com> | Wed Jun 27 09:45:42 2012 +0900 |
| committer | Kukjin Kim <kgene.kim@samsung.com> | Wed Jun 27 09:45:42 2012 +0900 |
| tree | 549e13c908561307b6c42afdb84558f888112144 | |
| parent | 65ab16fd385f72baf556fcebe5118d8b6f256ace [diff] |
ARM: EXYNOS: Remove the L2 cache latency setting for EXYNOS5 Since SYSRAM set the L2 cache latency on EXYNOS5 SoCs, no longer need that in the kernel. It helps to reduce booting time (no need cache disable and cache enable). Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>