tree 3237ced4f26741763bb6766ecbd19538488cf156
parent d8cfb5037bfc875e6dc8e09e4caceb443c04ff6a
author Hauke Mehrtens <hauke.mehrtens@lantiq.com> 1446071850 +0100
committer Ralf Baechle <ralf@linux-mips.org> 1447227420 +0100

MIPS: Lantiq: Add locking for PMU register and check status afterwards

The PMU register are accessed in a non atomic way and they could be
accessed by different threads simultaneously, which could cause
problems this patch adds locking around the PMU registers. In
addition we now also wait till the PMU is actually deactivated.

[ralf@linux-mips.org: Fix spelling mistake in commit message as noticed
by Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>.]

Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11381/
Patchwork: https://patchwork.linux-mips.org/patch/11396/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>