commit | cd847b7857b835f9730d6fc93c3f423fcacc50f7 | [log] [tgz] |
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author | David Daney <ddaney@caviumnetworks.com> | Tue Oct 13 11:26:03 2009 -0700 |
committer | Ralf Baechle <ralf@linux-mips.org> | Mon Nov 02 12:00:07 2009 +0100 |
tree | 530d31b2ea1c088f5cc6340baf7c2b6a7111e159 | |
parent | b6b74d5490c3ad88de503e0c5d44e4820b79b678 [diff] |
MIPS: Octeon: Use lockless interrupt controller operations when possible. Some newer Octeon chips have registers that allow lockless operation of the interrupt controller. Take advantage of them. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>