| commit | cd9d11820f4232856d6254a29fbb9c4f51a981c2 | [log] [tgz] |
|---|---|---|
| author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | Mon Aug 12 14:14:48 2013 -0300 |
| committer | David Woodhouse <David.Woodhouse@intel.com> | Fri Aug 30 21:34:51 2013 +0100 |
| tree | 905bc413c07bc79bf0b6d72b974ee81c03e5d34a | |
| parent | c0f3b8643a6fa2461d70760ec49d21d2b031d611 [diff] |
mtd: nand: pxa3xx: Handle ECC and DMA enable/disable properly When ECC is not selected, the ECC enable bit must be cleared in the NAND control register. Same applies to DMA. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>