| commit | cdf64eeeb0d762585e2126f3024458d199c2635d | [log] [tgz] |
|---|---|---|
| author | Chander Kashyap <chander.kashyap@linaro.org> | Thu Sep 26 14:36:35 2013 +0530 |
| committer | Mike Turquette <mturquette@linaro.org> | Wed Dec 04 10:46:45 2013 -0800 |
| tree | 425caea31cd6fd5d0fbdb5af7bae55dc9b6e82cf | |
| parent | 79ba3fdafdb5361e5158452ed6b1fca0bc39cbc8 [diff] |
clk: exynos5420: fix cpll clock register offsets Fixes cpll control and lock register offset values for Exynos5420 SoC. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>