drm/amdgpu: remove v_seq handling from the scheduler v2
Simply not used any more. Only keep 32bit atomic for fence sequence numbering.
v2: trivial rebase
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v1)
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 80f2cea..65e0e94 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1047,7 +1047,7 @@
struct amdgpu_ctx *amdgpu_ctx_get_ref(struct amdgpu_ctx *ctx);
uint64_t amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx, struct amdgpu_ring *ring,
- struct fence *fence, uint64_t queued_seq);
+ struct fence *fence);
struct fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
struct amdgpu_ring *ring, uint64_t seq);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index dc8d282..f91849b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -866,11 +866,9 @@
kfree(job);
goto out;
}
- job->ibs[parser->num_ibs - 1].sequence =
+ cs->out.handle =
amdgpu_ctx_add_fence(job->ctx, ring,
- &job->base.s_fence->base,
- job->base.s_fence->v_seq);
- cs->out.handle = job->base.s_fence->v_seq;
+ &job->base.s_fence->base);
list_sort(NULL, &parser->validated, cmp_size_smaller_first);
ttm_eu_fence_buffer_objects(&parser->ticket,
&parser->validated,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 8660c08..f024eff 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -236,17 +236,13 @@
}
uint64_t amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx, struct amdgpu_ring *ring,
- struct fence *fence, uint64_t queued_seq)
+ struct fence *fence)
{
struct amdgpu_ctx_ring *cring = & ctx->rings[ring->idx];
- uint64_t seq = 0;
+ uint64_t seq = cring->sequence;
unsigned idx = 0;
struct fence *other = NULL;
- if (amdgpu_enable_scheduler)
- seq = queued_seq;
- else
- seq = cring->sequence;
idx = seq % AMDGPU_CTX_MAX_CS_PENDING;
other = cring->fences[idx];
if (other) {
@@ -260,8 +256,7 @@
spin_lock(&ctx->ring_lock);
cring->fences[idx] = fence;
- if (!amdgpu_enable_scheduler)
- cring->sequence++;
+ cring->sequence++;
spin_unlock(&ctx->ring_lock);
fence_put(other);
@@ -274,21 +269,16 @@
{
struct amdgpu_ctx_ring *cring = & ctx->rings[ring->idx];
struct fence *fence;
- uint64_t queued_seq;
spin_lock(&ctx->ring_lock);
- if (amdgpu_enable_scheduler)
- queued_seq = amd_sched_next_queued_seq(&cring->entity);
- else
- queued_seq = cring->sequence;
- if (seq >= queued_seq) {
+ if (seq >= cring->sequence) {
spin_unlock(&ctx->ring_lock);
return ERR_PTR(-EINVAL);
}
- if (seq + AMDGPU_CTX_MAX_CS_PENDING < queued_seq) {
+ if (seq + AMDGPU_CTX_MAX_CS_PENDING < cring->sequence) {
spin_unlock(&ctx->ring_lock);
return NULL;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 13c5978..737c8e3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -126,7 +126,6 @@
struct amdgpu_ring *ring;
struct amdgpu_ctx *ctx, *old_ctx;
struct amdgpu_vm *vm;
- uint64_t sequence;
unsigned i;
int r = 0;
@@ -199,12 +198,9 @@
return r;
}
- sequence = amdgpu_enable_scheduler ? ib->sequence : 0;
-
if (!amdgpu_enable_scheduler && ib->ctx)
ib->sequence = amdgpu_ctx_add_fence(ib->ctx, ring,
- &ib->fence->base,
- sequence);
+ &ib->fence->base);
/* wrap the last IB with fence */
if (ib->user) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
index b7cbaa9..26b1793 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
@@ -435,8 +435,8 @@
seq_printf(m, " protected by 0x%016llx on ring %d",
a_fence->seq, a_fence->ring->idx);
if (s_fence)
- seq_printf(m, " protected by 0x%016llx on ring %d",
- s_fence->v_seq,
+ seq_printf(m, " protected by 0x%016x on ring %d",
+ s_fence->base.seqno,
s_fence->entity->scheduler->ring_id);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
index 06d7bf5..964b543 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
@@ -111,7 +111,6 @@
kfree(job);
return r;
}
- ibs[num_ibs - 1].sequence = job->base.s_fence->v_seq;
*f = fence_get(&job->base.s_fence->base);
mutex_unlock(&job->job_lock);
} else {