tree 75bc04868f32da8b0e6291e9f86d7fd87076c765
parent 99ec899eafe2ec0a7dd96e9de5fa0a2bea3032ba
author Lukasz Majewski <l.majewski@samsung.com> 1381320522 +0200
committer Rafael J. Wysocki <rafael.j.wysocki@intel.com> 1382010768 +0200

cpufreq: exynos4x12: Use the common clock framework to set APLL clock rate

In the exynos4x12_set_apll() function, the APLL frequency is set with
direct register manipulation.

Such approach is not allowed in the common clock framework. The frequency
is changed, but the corresponding clock value is not updated. This causes
wrong frequency read from cpufreq's cpuinfo_cur_freq sysfs attribute.

Also direct manipulation with PLL's S parameter has been removed. It is
already done at PLL35xx code.

Tested at:
- Exynos4412 - Trats2 board (linux 3.12-rc4)

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>