tree 57b2a9377eefba158baf48afcd56c50f55d1fd57
parent 322a8b034003c0d46d39af85bf24fee27b902f48
author Dong Aisheng <b29396@freescale.com> 1311133301 +0800
committer Sascha Hauer <s.hauer@pengutronix.de> 1314082573 +0200

ARM: mxs: add saif clock

Set pll0 as parent.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>