| #ifndef __ASM_SH_BITOPS_H |
| #define __ASM_SH_BITOPS_H |
| |
| #ifdef __KERNEL__ |
| |
| #ifndef _LINUX_BITOPS_H |
| #error only <linux/bitops.h> can be included directly |
| #endif |
| |
| #include <asm/system.h> |
| /* For __swab32 */ |
| #include <asm/byteorder.h> |
| |
| static inline void set_bit(int nr, volatile void * addr) |
| { |
| int mask; |
| volatile unsigned int *a = addr; |
| unsigned long flags; |
| |
| a += nr >> 5; |
| mask = 1 << (nr & 0x1f); |
| local_irq_save(flags); |
| *a |= mask; |
| local_irq_restore(flags); |
| } |
| |
| /* |
| * clear_bit() doesn't provide any barrier for the compiler. |
| */ |
| #define smp_mb__before_clear_bit() barrier() |
| #define smp_mb__after_clear_bit() barrier() |
| static inline void clear_bit(int nr, volatile void * addr) |
| { |
| int mask; |
| volatile unsigned int *a = addr; |
| unsigned long flags; |
| |
| a += nr >> 5; |
| mask = 1 << (nr & 0x1f); |
| local_irq_save(flags); |
| *a &= ~mask; |
| local_irq_restore(flags); |
| } |
| |
| static inline void change_bit(int nr, volatile void * addr) |
| { |
| int mask; |
| volatile unsigned int *a = addr; |
| unsigned long flags; |
| |
| a += nr >> 5; |
| mask = 1 << (nr & 0x1f); |
| local_irq_save(flags); |
| *a ^= mask; |
| local_irq_restore(flags); |
| } |
| |
| static inline int test_and_set_bit(int nr, volatile void * addr) |
| { |
| int mask, retval; |
| volatile unsigned int *a = addr; |
| unsigned long flags; |
| |
| a += nr >> 5; |
| mask = 1 << (nr & 0x1f); |
| local_irq_save(flags); |
| retval = (mask & *a) != 0; |
| *a |= mask; |
| local_irq_restore(flags); |
| |
| return retval; |
| } |
| |
| static inline int test_and_clear_bit(int nr, volatile void * addr) |
| { |
| int mask, retval; |
| volatile unsigned int *a = addr; |
| unsigned long flags; |
| |
| a += nr >> 5; |
| mask = 1 << (nr & 0x1f); |
| local_irq_save(flags); |
| retval = (mask & *a) != 0; |
| *a &= ~mask; |
| local_irq_restore(flags); |
| |
| return retval; |
| } |
| |
| static inline int test_and_change_bit(int nr, volatile void * addr) |
| { |
| int mask, retval; |
| volatile unsigned int *a = addr; |
| unsigned long flags; |
| |
| a += nr >> 5; |
| mask = 1 << (nr & 0x1f); |
| local_irq_save(flags); |
| retval = (mask & *a) != 0; |
| *a ^= mask; |
| local_irq_restore(flags); |
| |
| return retval; |
| } |
| |
| #include <asm-generic/bitops/non-atomic.h> |
| |
| static inline unsigned long ffz(unsigned long word) |
| { |
| unsigned long result; |
| |
| __asm__("1:\n\t" |
| "shlr %1\n\t" |
| "bt/s 1b\n\t" |
| " add #1, %0" |
| : "=r" (result), "=r" (word) |
| : "0" (~0L), "1" (word) |
| : "t"); |
| return result; |
| } |
| |
| /** |
| * __ffs - find first bit in word. |
| * @word: The word to search |
| * |
| * Undefined if no bit exists, so code should check against 0 first. |
| */ |
| static inline unsigned long __ffs(unsigned long word) |
| { |
| unsigned long result; |
| |
| __asm__("1:\n\t" |
| "shlr %1\n\t" |
| "bf/s 1b\n\t" |
| " add #1, %0" |
| : "=r" (result), "=r" (word) |
| : "0" (~0L), "1" (word) |
| : "t"); |
| return result; |
| } |
| |
| #include <asm-generic/bitops/find.h> |
| #include <asm-generic/bitops/ffs.h> |
| #include <asm-generic/bitops/hweight.h> |
| #include <asm-generic/bitops/lock.h> |
| #include <asm-generic/bitops/sched.h> |
| #include <asm-generic/bitops/ext2-non-atomic.h> |
| #include <asm-generic/bitops/ext2-atomic.h> |
| #include <asm-generic/bitops/minix.h> |
| #include <asm-generic/bitops/fls.h> |
| #include <asm-generic/bitops/fls64.h> |
| |
| #endif /* __KERNEL__ */ |
| |
| #endif /* __ASM_SH_BITOPS_H */ |