| commit | d1c038d620c45fbbc65bcadf813a86bca686dd31 | [log] [tgz] |
|---|---|---|
| author | Senthil Balasubramanian <senthilkumar@atheros.com> | Fri Apr 22 11:32:09 2011 +0530 |
| committer | John W. Linville <linville@tuxdriver.com> | Mon Apr 25 14:50:17 2011 -0400 |
| tree | 7041ac78c80e58f43fb507c209608d8a3bab7756 | |
| parent | 353e5019e048562dc8f434c6237d41ef5e758922 [diff] |
ath9k_hw: Fix incorrect baseband PLL phase shift for AR9485 we should program the AR9485 baseband PLL phase shift to 6 and a redundant setting overwrites the correct value. Remove the incorrect and unwnated register setting. Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>