| commit | d25b4f65bf7608ba7f59d3f0251ea57e34b74238 | [log] [tgz] |
|---|---|---|
| author | Alban Bedel <albeu@free.fr> | Sun May 31 01:52:26 2015 +0200 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Sun Jun 21 21:54:02 2015 +0200 |
| tree | 5e147f6167fcb3fd5e569fe22a6bdd26ea981945 | |
| parent | 03c8c407a8c9ba1772ea7c086b7a0f7bceecdb65 [diff] |
DEVICETREE: Add bindings for the ATH79 DDR controllers The DDR controller of the ARxxx and AR9xxx families provides an interface to flush the FIFO between various devices and the DDR. This is mainly used by the IRQ controller to flush the FIFO before running the interrupt handler of such devices. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>