tree 3ae18b92e3b59f0313f8a7492567a18fbf0f8d46
parent f4890b5c04b6301ef9c3c44ecbfe9955efdbaa17
author Jarkko Nikula <jhnikula@gmail.com> 1251462935 +0300
committer Mark Brown <broonie@opensource.wolfsonmicro.com> 1251481003 +0100

ASoC: OMAP: Add functionality to set CLKR and FSR sources in McBSP DAI

The McBSP1 port in OMAP3 processors (I believe OMAP2 too but I don't have
specifications to check it) have additional CLKR and FSR pins for McBSP1
receiver. Reset default is that receiver is using bit clock and frame
sync signal from those pins but it is possible to configure to use
also CLKX and FSX pins as well. In fact, other McBSP ports are doing that
internally that transmitter and receiver share the CLKX and FSX.

Add functionaly that machine drivers can set the CLKR and FSR sources by
using the snd_soc_dai_set_sysclk.

Thanks to "Aggarwal, Anuj" <anuj.aggarwal@ti.com> for reporting the issue.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>