| commit | d2f78e95e42a9130002c76f1a1f76e657a4b4004 | [log] [tgz] |
|---|---|---|
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | Thu May 08 12:01:48 2014 +0300 |
| committer | Vinod Koul <vinod.koul@intel.com> | Thu May 22 15:37:24 2014 +0530 |
| tree | ba270d4a8ca0666bd753f3bad9088a113730452a | |
| parent | fbeb91fe8e4107dc88df4eaa21de02c3fd9d1cd5 [diff] |
dmaengine: dw: enable clock before access hclk signal is a bus clock. So, it means we have to have it enabled during access to the DMA controller. This patch makes sure that we enable clock before access to the device, though it currently works on Intel hardware. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>