tree 7a1208b29e81c620265899b2b9a940e5a7328ed9
parent 7d8bfa26f236bc9528415402dda6b498a0682e42
author Joerg Roedel <joro@8bytes.org> 1366300504 +0200
committer Joerg Roedel <joro@8bytes.org> 1366397606 +0200

iommu/amd: Workaround for ERBT1312

Work around an IOMMU  hardware bug where clearing the
EVT_INT or PPR_INT bit in the status register may race with
the hardware trying to set it again. When not handled the
bit might not be cleared and we lose all future event or ppr
interrupts.

Reported-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Joerg Roedel <joro@8bytes.org>