| commit | 0182dcc52c759d005cc3e65deadee9f166cdd7d0 | [log] [tgz] |
|---|---|---|
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | Mon Aug 17 18:51:44 2009 +0100 |
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | Mon Aug 17 18:53:44 2009 +0100 |
| tree | 76265f416bbaef69fb1bd94b636ec2ad77d48a97 | |
| parent | 1ca04065c3569beb42b9376952df8c96f430f753 [diff] |
ASoC: Fix WM8993 MCLK configuration for high frequency MCLKs When used without the PLL we were accidentally clearing the MCLK/2 divider, resulting in a double rate SYSCLK when the divider should have been used. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>