msm: kgsl: Change register programming for dumping debug bus
Set the granularity and trace enable fields in the
DBGC_CFG_DBGBUS_CNTLT to 0 to ensure no mismatches between
dupicate values on the debug bus. Additionally, add a 1 us
delay between writing to the debug select registers and reading
from trace buf register. Also do the same for the CX debug
controller registers.
Change-Id: I8748c5b9c6860b28e1448088d4b7fbab7ac439b0
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
diff --git a/drivers/gpu/msm/adreno_a6xx_snapshot.c b/drivers/gpu/msm/adreno_a6xx_snapshot.c
index decbff3..63dbde0 100644
--- a/drivers/gpu/msm/adreno_a6xx_snapshot.c
+++ b/drivers/gpu/msm/adreno_a6xx_snapshot.c
@@ -1002,6 +1002,12 @@
kgsl_regwrite(device, A6XX_DBGC_CFG_DBGBUS_SEL_C, reg);
kgsl_regwrite(device, A6XX_DBGC_CFG_DBGBUS_SEL_D, reg);
+ /*
+ * There needs to be a delay of 1 us to ensure enough time for correct
+ * data is funneled into the trace buffer
+ */
+ udelay(1);
+
kgsl_regread(device, A6XX_DBGC_CFG_DBGBUS_TRACE_BUF2, val);
val++;
kgsl_regread(device, A6XX_DBGC_CFG_DBGBUS_TRACE_BUF1, val);
@@ -1100,6 +1106,12 @@
_cx_dbgc_regwrite(A6XX_CX_DBGC_CFG_DBGBUS_SEL_C, reg);
_cx_dbgc_regwrite(A6XX_CX_DBGC_CFG_DBGBUS_SEL_D, reg);
+ /*
+ * There needs to be a delay of 1 us to ensure enough time for correct
+ * data is funneled into the trace buffer
+ */
+ udelay(1);
+
_cx_dbgc_regread(A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF2, val);
val++;
_cx_dbgc_regread(A6XX_CX_DBGC_CFG_DBGBUS_TRACE_BUF1, val);
@@ -1148,8 +1160,8 @@
kgsl_regwrite(device, A6XX_DBGC_CFG_DBGBUS_CNTLT,
(0xf << A6XX_DBGC_CFG_DBGBUS_CNTLT_SEGT_SHIFT) |
- (0x4 << A6XX_DBGC_CFG_DBGBUS_CNTLT_GRANU_SHIFT) |
- (0x20 << A6XX_DBGC_CFG_DBGBUS_CNTLT_TRACEEN_SHIFT));
+ (0x0 << A6XX_DBGC_CFG_DBGBUS_CNTLT_GRANU_SHIFT) |
+ (0x0 << A6XX_DBGC_CFG_DBGBUS_CNTLT_TRACEEN_SHIFT));
kgsl_regwrite(device, A6XX_DBGC_CFG_DBGBUS_CNTLM,
0xf << A6XX_DBGC_CFG_DBGBUS_CTLTM_ENABLE_SHIFT);
@@ -1191,8 +1203,8 @@
if (a6xx_cx_dbgc) {
_cx_dbgc_regwrite(A6XX_CX_DBGC_CFG_DBGBUS_CNTLT,
(0xf << A6XX_DBGC_CFG_DBGBUS_CNTLT_SEGT_SHIFT) |
- (0x4 << A6XX_DBGC_CFG_DBGBUS_CNTLT_GRANU_SHIFT) |
- (0x20 << A6XX_DBGC_CFG_DBGBUS_CNTLT_TRACEEN_SHIFT));
+ (0x0 << A6XX_DBGC_CFG_DBGBUS_CNTLT_GRANU_SHIFT) |
+ (0x0 << A6XX_DBGC_CFG_DBGBUS_CNTLT_TRACEEN_SHIFT));
_cx_dbgc_regwrite(A6XX_CX_DBGC_CFG_DBGBUS_CNTLM,
0xf << A6XX_CX_DBGC_CFG_DBGBUS_CNTLM_ENABLE_SHIFT);