| commit | d49bdb0e1054d022cc6f88fcecf9c79bae66eab0 | [log] [tgz] |
|---|---|---|
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | Fri Jul 04 11:50:31 2014 -0300 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Wed Jul 23 07:05:32 2014 +0200 |
| tree | db3e2bc2ce5e819705c1ebf21e10bec934dce8ad | |
| parent | c5107b875a84f0b25d1d6b8fbc9acb22440b746f [diff] |
drm/i915: extract and improve gen8_irq_power_well_post_enable Move it from hsw_power_well_post_enable() (intel_pm.c) to i915_irq.c so we can reuse the nice IRQ macros we have there. The main difference is that now we're going to check if the IIR register is non-zero when we try to re-enable the interrupts. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>