tree 9e112f501b5695b2798dd78d3ec142d8eddfd97d
parent 766d305fead341889e7b9611fdc97236075a29fb
author Ranjith Lohithakshan <ranjithl@ti.com> 1270030590 -0600
committer Paul Walmsley <paul@pwsan.com> 1270030590 -0600

OMAP3: clock: fix enable bit used for dpll4_m4x2 clock

The enable bit for dpll4_m4x2 clock should be OMAP3430_PWRDN_DSS1_SHIFT.
The code erroneously uses OMAP3430_PWRDN_CAM_SHIFT which is meant for
dpll4_m5x2 clock.

This came into notice during a recent review of the clock tree.

Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>