| commit | d75d538899da00bdf8f152c65a99eda1ab59daa3 | [log] [tgz] |
|---|---|---|
| author | Mauro Carvalho Chehab <mchehab@redhat.com> | Wed Apr 10 15:54:46 2013 -0300 |
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | Tue Apr 16 21:32:27 2013 -0300 |
| tree | ac90e2118786afbc380968f56c22f0b2cd27af58 | |
| parent | 9cc2570a1dd74c22b4644b325257cf92d4cdb031 [diff] |
[media] r820t: proper initialize the PLL register The rtl-sdr library, from where this driver was initially based, doesn't use half PLL clock, but this is used on the Realtek Kernel driver. So, also do the same here. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com> Tested-by: Antti Palosaari <crope@iki.fi>