| commit | d936d527d241b606b0280034b3972b7825d3704c | [log] [tgz] |
|---|---|---|
| author | Adam Thomson <Adam.Thomson.Opensource@diasemi.com> | Thu Aug 04 15:35:41 2016 +0100 |
| committer | Mark Brown <broonie@kernel.org> | Mon Aug 08 11:54:40 2016 +0100 |
| tree | 6cab9099c9346cdd10ec584831c73763a4d4e5dc | |
| parent | 4c75225aa05753217a81ed10f136b86fb94c5922 [diff] |
ASoC: da7213: Improve 32KHz mode PLL locking To aid PLL in locking on to a 32KHz MCLK, some register mods are made during PLL configuration, and when enabling the DAI, to achieve the full range of sample rates. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>