tree 940726424db4a5ff80a69a30203ce34ac49f4394
parent 596efe4792c50163578578bd4fe470f97652aad7
author Benoit Cousson <b-cousson@ti.com> 1292990893 -0700
committer Paul Walmsley <paul@pwsan.com> 1292990893 -0700

OMAP4: clock data: Add control for pad_clks_ck and slimbus_clk

The gating of pad_clks and slimbus_ck is controlled by the PRCM, but
since the clock source is external, this is the SW responsability
to gate / un-gate it when the mcpdm or slimbus module need to be used.
There is no autogating possible with such external clock.

Add SW control to enable / disable this SW gating in the pad_clks_ck
and slimbus_clk clock node.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>