tree 546c3fa0dd9bfa89a2a1c0fc63acec2e0742c529
parent d83c82ce7ccd7acd9aab052aa25d40371cde62e4
author Boris BREZILLON <boris.brezillon@free-electrons.com> 1397137964 +0200
committer Linus Walleij <linus.walleij@linaro.org> 1398167108 +0200

pinctrl: sunxi: define A31 R_PIO pin functions

The A31 SoC provides both PL and PM pio bank through the R_PIO block.

These pins all support gpio function and can bbe assigned to system
peripherals (like TWI, P2WI, JTAG, ...)

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>