drm/msm/sde: updates to planes atomic_check
Add additional checks for in/out rectangles.
Change-Id: Ie50f6dd23135353a71f7316b5ace06786160b669
Signed-off-by: Clarence Ip <cip@codeaurora.org>
diff --git a/drivers/gpu/drm/msm/sde/sde_formats.c b/drivers/gpu/drm/msm/sde/sde_formats.c
index e881a35..a32a6b8 100644
--- a/drivers/gpu/drm/msm/sde/sde_formats.c
+++ b/drivers/gpu/drm/msm/sde/sde_formats.c
@@ -17,67 +17,67 @@
INTERLEAVED_RGB_FMT(ARGB8888,
COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA,
- true, 4, VALID_ROT_WB_FORMAT),
+ true, 4, SDE_FORMAT_FLAG_ROTATOR),
INTERLEAVED_RGB_FMT(ABGR8888,
COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA,
- true, 4, VALID_ROT_WB_FORMAT),
+ true, 4, SDE_FORMAT_FLAG_ROTATOR),
INTERLEAVED_RGB_FMT(RGBA8888,
COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr,
- true, 4, VALID_ROT_WB_FORMAT),
+ true, 4, SDE_FORMAT_FLAG_ROTATOR),
INTERLEAVED_RGB_FMT(BGRA8888,
COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb,
- true, 4, VALID_ROT_WB_FORMAT),
+ true, 4, SDE_FORMAT_FLAG_ROTATOR),
INTERLEAVED_RGB_FMT(XRGB8888,
COLOR_8BIT, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA,
- true, 4, VALID_ROT_WB_FORMAT),
+ true, 4, SDE_FORMAT_FLAG_ROTATOR),
INTERLEAVED_RGB_FMT(RGB888,
0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C1_B_Cb, C0_G_Y, C2_R_Cr, 0,
- false, 3, VALID_ROT_WB_FORMAT),
+ false, 3, SDE_FORMAT_FLAG_ROTATOR),
INTERLEAVED_RGB_FMT(BGR888,
0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C2_R_Cr, C0_G_Y, C1_B_Cb, 0,
- false, 3, VALID_ROT_WB_FORMAT),
+ false, 3, SDE_FORMAT_FLAG_ROTATOR),
INTERLEAVED_RGB_FMT(RGB565,
0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT,
C1_B_Cb, C0_G_Y, C2_R_Cr, 0,
- false, 2, VALID_ROT_WB_FORMAT),
+ false, 2, SDE_FORMAT_FLAG_ROTATOR),
INTERLEAVED_RGB_FMT(BGR565,
0, 5, 6, 5,
C2_R_Cr, C0_G_Y, C1_B_Cb, 0,
- false, 2, VALID_ROT_WB_FORMAT),
+ false, 2, SDE_FORMAT_FLAG_ROTATOR),
PSEDUO_YUV_FMT(NV12,
0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C1_B_Cb, C2_R_Cr,
- SDE_MDP_CHROMA_420, VALID_ROT_WB_FORMAT),
+ SDE_MDP_CHROMA_420, SDE_FORMAT_FLAG_ROTATOR),
PSEDUO_YUV_FMT(NV21,
0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C2_R_Cr, C1_B_Cb,
- SDE_MDP_CHROMA_420, VALID_ROT_WB_FORMAT),
+ SDE_MDP_CHROMA_420, SDE_FORMAT_FLAG_ROTATOR),
PSEDUO_YUV_FMT(NV16,
0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C1_B_Cb, C2_R_Cr,
- SDE_MDP_CHROMA_H2V1, VALID_ROT_WB_FORMAT),
+ SDE_MDP_CHROMA_H2V1, SDE_FORMAT_FLAG_ROTATOR),
PSEDUO_YUV_FMT(NV61,
0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C2_R_Cr, C1_B_Cb,
- SDE_MDP_CHROMA_H2V1, VALID_ROT_WB_FORMAT),
+ SDE_MDP_CHROMA_H2V1, SDE_FORMAT_FLAG_ROTATOR),
INTERLEAVED_YUV_FMT(VYUY,
0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
@@ -107,13 +107,13 @@
0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C2_R_Cr, C1_B_Cb, C0_G_Y,
false, SDE_MDP_CHROMA_420, 2,
- VALID_ROT_WB_FORMAT),
+ SDE_FORMAT_FLAG_ROTATOR),
PLANAR_YUV_FMT(YVU420,
0, COLOR_8BIT, COLOR_8BIT, COLOR_8BIT,
C1_B_Cb, C2_R_Cr, C0_G_Y,
false, SDE_MDP_CHROMA_420, 2,
- VALID_ROT_WB_FORMAT),
+ SDE_FORMAT_FLAG_ROTATOR),
};
struct sde_mdp_format_params *sde_mdp_get_format_params(u32 format,