tree 8ef49664dfd6eb538264abec6df545abd8d4738e
parent 0ba86d7edea1f9f2d9497c31200910263e8b4128
author Mythri P K <mythripk@ti.com> 1329806458 +0530
committer Tomi Valkeinen <tomi.valkeinen@ti.com> 1331035690 +0200

OMAPDSS: HDMI: Add M2 divider while calculating clkout

While calculating regm and regmf value add using M2 divider in
the equation.
Formula for calculating:
Output clock on digital core domain:
	CLKOUT = (M / (N+1))*CLKINP*(1/M2)
Internal oscillator output clock on internal LDO domain:
	CLKDCOLDO = (M / (N+1))*CLKINP
The current code when allows variable M2 values as input
ignores using M2 divider values in calculation of regm and regmf.
so fix it by using M2 in calculation although the default value for
M2 is 1.

Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>