| commit | de4218634e3df6d73a3e6cdfdf3a17fa3bc7e013 | [log] [tgz] |
|---|---|---|
| author | Andi Kleen <ak@suse.de> | Wed Jan 30 13:32:37 2008 +0100 |
| committer | Ingo Molnar <mingo@elte.hu> | Wed Jan 30 13:32:37 2008 +0100 |
| tree | df7438f5ee81fc7c93f5e9ab3f4249a5afc3d31c | |
| parent | 27efeb67714608b28c0b213cceb6080749435c6b [diff] |
x86: implement support to synchronize RDTSC through MFENCE on AMD CPUs According to AMD RDTSC can be synchronized through MFENCE. Implement the necessary CPUID bit for that. Cc: andreas.herrmann3@amd.com Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>