| commit | de4a8bd16205283e9cb746e8fbfa7f9735c039b5 | [log] [tgz] |
|---|---|---|
| author | Daniel Vetter <daniel.vetter@ffwll.ch> | Wed Apr 11 20:42:38 2012 +0200 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Tue Apr 17 11:19:52 2012 +0200 |
| tree | 4c9f0ba6aec0d92a81f5032c1d49917de5081e87 | |
| parent | 767878908e7cc28c440c5431f6591157d8bd4ae7 [diff] |
drm/i915: implement a media hang w/a Contrary to the other clock gating w/a in GEN6_UCGCTL1, this one is actually documented in Bspec, vol1g "GT Interface Registers [SNB]", Section 1.5.1 "UCGCTL1 - Unit Level Clock Gating Control 1". Supposedly this can prevent hangs on the media ring. Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>