| commit | df1a2776a795848f4dbc7c0cb396158b43eb8aa3 | [log] [tgz] |
|---|---|---|
| author | Irina Tirdea <irina.tirdea@intel.com> | Fri Aug 12 16:27:57 2016 -0500 |
| committer | Mark Brown <broonie@kernel.org> | Mon Aug 15 15:14:57 2016 +0100 |
| tree | ddcd5d5cf15b8702744bb61b2089776d80b2dbd1 | |
| parent | 59e8b6520c6e2e867b35bc402d9a3f28aef3b2bc [diff] |
ASoC: Intel: bytcr_rt5640: add MCLK support Use platform clocks "pmc_plt_clk_3" when MCLK quirk is defined. By default always enable the 19.2 MHz PLL. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Irina Tirdea <irina.tirdea@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>