tree 6079c151788b2dfd0f43ab2149fb948716b595e3
parent 8e96f4f730e63adfa281e934a2eb389624356776
author Vicky Wallace <vwallace@codeaurora.org> 1509150934 -0700
committer Vicky Wallace <vwallace@codeaurora.org> 1509493393 -0700

ARM: dts: msm: Fix UART clock reference for sdxpoorwills

UART registers starts the numbering from 0
so UART2 is the third instance which is BLSP1 UART3 clock.

CRs-Fixed: 2135284
Change-Id: Id94930ae8c1d4e68e1883eb54b3c7cb944d5ac09
Signed-off-by: Vicky Wallace <vwallace@codeaurora.org>