tree f3c7a71dfe30f4c50e5487a7725bcff675406a56
parent e2171b62ec47b0e55737a477288693bb83e816c8
parent ffe8cffc8be1ae47c08cbc3571bed6b5b0fa53ad
author Greg Kroah-Hartman <gregkh@google.com> 1557859384 +0200
committer Greg Kroah-Hartman <gregkh@google.com> 1557859384 +0200
mergetag object ffe8cffc8be1ae47c08cbc3571bed6b5b0fa53ad
 type commit
 tag v4.9.176
 tagger Greg Kroah-Hartman <gregkh@linuxfoundation.org> 1557854382 +0200
 
 This is the 4.9.176 stable release
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAlza+K4ACgkQONu9yGCS
 aT7iOQ//fGjAW4YSzJitHs+vtPLFUuwNA2DseS2+pBscx80MWQCDadzNq2/LPNBl
 ZwVCJ7YfUG53sK6rdgivoTwl8r+509uq8Kp18VdhaTTQxbVZaOEGqKjRiQ/Dh/JF
 utb1BAdHoVw6gwzK/4miRYGXhJvn8VbTi5WfK58wngb8O7MbT3ZkVV64UrVXVTNP
 N5/+6OcNepqT2CEbS+Ls66h8LFW1YPQskX6Z+ydAEYjOFKL29mxaU41FvoSJj3BV
 4jHNfpfaNStBfOMyu69bgvv9u5QFBl2vMpsPbJEap8MfSNM3+Q5wvqek7z0lDYkL
 vR8KBqMK0jOl4CmNdmV6eLryimtjhuRubaPcTCxCOgHS7Iy/oHFMof8nYmMXs1BV
 yBAjKQ1xdMUVR2dOFtohJW7Tny5Z/tESjIdtmR93qUHaNQQvP3yR8Pi+bL4eH+zJ
 Eui4xTspC6aAQlV6tbwL5bBmboMfy9hZQOuv4UG5gRWuGNdTURTzW7KXE3bhvz70
 RLl4V2UVXzfV+J4DF7/e/U1OeudlJtBhySF5LhkEJq/qhxurj9qchG+XURq5mgjX
 L0iToJ0iJiD0JfJ5LUIyOMrEyWnWaTNt7OwO2pD6EP82KiayMAgIG7NJcmvmPmb+
 /1yHpCgcdHFQGplRQ/Pa9KLEf9ctfpxvNTbDW/HSxx9IU3D3Euk=
 =Tq4Y
 -----END PGP SIGNATURE-----

Merge 4.9.176 into android-4.9

Changes in 4.9.176
	x86/MCE: Save microcode revision in machine check records
	x86/cpufeatures: Hide AMD-specific speculation flags
	x86/bugs: Add AMD's variant of SSB_NO
	x86/bugs: Add AMD's SPEC_CTRL MSR usage
	x86/bugs: Switch the selection of mitigation from CPU vendor to CPU features
	x86/bugs: Fix the AMD SSBD usage of the SPEC_CTRL MSR
	x86/microcode/intel: Add a helper which gives the microcode revision
	x86/microcode/intel: Check microcode revision before updating sibling threads
	x86/microcode: Make sure boot_cpu_data.microcode is up-to-date
	x86/microcode: Update the new microcode revision unconditionally
	x86/mm: Use WRITE_ONCE() when setting PTEs
	bitops: avoid integer overflow in GENMASK(_ULL)
	x86/speculation: Simplify the CPU bug detection logic
	locking/atomics, asm-generic: Move some macros from <linux/bitops.h> to a new <linux/bits.h> file
	x86/speculation: Remove SPECTRE_V2_IBRS in enum spectre_v2_mitigation
	x86/cpu: Sanitize FAM6_ATOM naming
	Documentation/l1tf: Fix small spelling typo
	x86/speculation: Apply IBPB more strictly to avoid cross-process data leak
	x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation
	x86/speculation: Propagate information about RSB filling mitigation to sysfs
	x86/speculation/l1tf: Drop the swap storage limit restriction when l1tf=off
	x86/speculation: Update the TIF_SSBD comment
	x86/speculation: Clean up spectre_v2_parse_cmdline()
	x86/speculation: Remove unnecessary ret variable in cpu_show_common()
	x86/speculation: Move STIPB/IBPB string conditionals out of cpu_show_common()
	x86/speculation: Disable STIBP when enhanced IBRS is in use
	x86/speculation: Rename SSBD update functions
	x86/speculation: Reorganize speculation control MSRs update
	x86/Kconfig: Select SCHED_SMT if SMP enabled
	sched: Add sched_smt_active()
	x86/speculation: Rework SMT state change
	x86/l1tf: Show actual SMT state
	x86/speculation: Reorder the spec_v2 code
	x86/speculation: Mark string arrays const correctly
	x86/speculataion: Mark command line parser data __initdata
	x86/speculation: Unify conditional spectre v2 print functions
	x86/speculation: Add command line control for indirect branch speculation
	x86/speculation: Prepare for per task indirect branch speculation control
	x86/process: Consolidate and simplify switch_to_xtra() code
	x86/speculation: Avoid __switch_to_xtra() calls
	x86/speculation: Prepare for conditional IBPB in switch_mm()
	x86/speculation: Split out TIF update
	x86/speculation: Prepare arch_smt_update() for PRCTL mode
	x86/speculation: Prevent stale SPEC_CTRL msr content
	x86/speculation: Add prctl() control for indirect branch speculation
	x86/speculation: Enable prctl mode for spectre_v2_user
	x86/speculation: Add seccomp Spectre v2 user space protection mode
	x86/speculation: Provide IBPB always command line options
	kvm: x86: Report STIBP on GET_SUPPORTED_CPUID
	x86/msr-index: Cleanup bit defines
	x86/speculation: Consolidate CPU whitelists
	x86/speculation/mds: Add basic bug infrastructure for MDS
	x86/speculation/mds: Add BUG_MSBDS_ONLY
	x86/kvm: Expose X86_FEATURE_MD_CLEAR to guests
	x86/speculation/mds: Add mds_clear_cpu_buffers()
	x86/speculation/mds: Clear CPU buffers on exit to user
	x86/kvm/vmx: Add MDS protection when L1D Flush is not active
	x86/speculation/mds: Conditionally clear CPU buffers on idle entry
	x86/speculation/mds: Add mitigation control for MDS
	x86/speculation/mds: Add sysfs reporting for MDS
	x86/speculation/mds: Add mitigation mode VMWERV
	Documentation: Move L1TF to separate directory
	Documentation: Add MDS vulnerability documentation
	x86/speculation/mds: Add mds=full,nosmt cmdline option
	x86/speculation: Move arch_smt_update() call to after mitigation decisions
	x86/speculation/mds: Add SMT warning message
	x86/speculation/mds: Fix comment
	x86/speculation/mds: Print SMT vulnerable on MSBDS with mitigations off
	cpu/speculation: Add 'mitigations=' cmdline option
	x86/speculation: Support 'mitigations=' cmdline option
	x86/speculation/mds: Add 'mitigations=' support for MDS
	x86/mds: Add MDSUM variant to the MDS documentation
	Documentation: Correct the possible MDS sysfs values
	x86/speculation/mds: Fix documentation typo
	x86: stop exporting msr-index.h to userland
	x86/cpu/bugs: Use __initconst for 'const' init data
	Linux 4.9.176

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>