| commit | e06e4c2d530fd4995c41083009647263ccd77d3b | [log] [tgz] |
|---|---|---|
| author | Oskar Schirmer <oskar@scara.com> | Mon Aug 05 07:36:02 2013 +0000 |
| committer | Mark Brown <broonie@linaro.org> | Mon Aug 05 17:03:42 2013 +0100 |
| tree | f9a823c1ad1b12e386089d9ad1436845486ef0c6 | |
| parent | cb23e852aabb50f5083fb734c2067220d087d26e [diff] |
ASoC: sgtl5000: fix codec clock source transition to avoid clockless moment Powering down PLL before switching to a mode that does not use it is a bad idea. It would cause the SGTL5000 be without internal clock supply, especially on the I2C interface, which would make subsequent access to it fail. Thus, in case of not using PLL any longer, first set the mode control, then power down PLL. Signed-off-by: Oskar Schirmer <oskar@scara.com> Signed-off-by: Mark Brown <broonie@linaro.org>