mwifiex: 4-byte alignment in mwifiex_process_sta_txpd()
In XMIT path, the skb that we get from the kernel itself is not
aligned with 4-byte boundary on some embedded platforms.
Had it not been the presence of tx_pkt_offset field in txpd, 4 byte
memory alignment was not possible without memmove of entire skb.
And that would have increased MIPS instead of reducing.
With this patch few memory cycles can be saved while fetching
interface header and txpd structure because of 4 bytes memory
alignment.
Reported-by: Philip Rakity <prakity@marvell.com>
Signed-off-by: Yogesh Ashok Powar <yogeshp@marvell.com>
Tested-by: Philip Rakity <prakity@marvell.com>
Signed-off-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2 files changed