Merge "usb: dwc3-msm: Disable RxTerm Detection by Core in U3 state"
diff --git a/arch/arm/configs/msm8909-perf_defconfig b/arch/arm/configs/msm8909-perf_defconfig
index 3f8ba5f..b4ae846 100644
--- a/arch/arm/configs/msm8909-perf_defconfig
+++ b/arch/arm/configs/msm8909-perf_defconfig
@@ -258,6 +258,7 @@
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_QPNP_POWER_ON=y
+CONFIG_STMVL53L0X=y
CONFIG_INPUT_UINPUT=y
CONFIG_SERIAL_MSM_HS=y
CONFIG_SERIAL_MSM_SMD=y
@@ -429,6 +430,8 @@
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
CONFIG_CNSS_CRYPTO=y
+CONFIG_IIO=y
+CONFIG_INV_ICM20602_IIO=y
CONFIG_PWM=y
CONFIG_PWM_QPNP=y
CONFIG_QTI_MPM=y
diff --git a/arch/arm/configs/msm8909_defconfig b/arch/arm/configs/msm8909_defconfig
index 009ead2..4d1bda0 100644
--- a/arch/arm/configs/msm8909_defconfig
+++ b/arch/arm/configs/msm8909_defconfig
@@ -308,11 +308,18 @@
CONFIG_QPNP_LINEAR_CHARGER=y
CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
CONFIG_THERMAL=y
+CONFIG_THERMAL_WRITABLE_TRIPS=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_THERMAL_GOV_LOW_LIMITS=y
+CONFIG_CPU_THERMAL=y
+CONFIG_DEVFREQ_THERMAL=y
CONFIG_THERMAL_QPNP=y
CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_THERMAL_TSENS=y
CONFIG_MSM_BCL_PERIPHERAL_CTL=y
CONFIG_QTI_THERMAL_LIMITS_DCVS=y
+CONFIG_QTI_QMI_COOLING_DEVICE=y
+CONFIG_REGULATOR_COOLING_DEVICE=y
CONFIG_MFD_QCOM_RPM=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_MFD_SYSCON=y
diff --git a/arch/arm/configs/msm8909w-perf_defconfig b/arch/arm/configs/msm8909w-perf_defconfig
index 3094af9..0e56f7f 100644
--- a/arch/arm/configs/msm8909w-perf_defconfig
+++ b/arch/arm/configs/msm8909w-perf_defconfig
@@ -448,6 +448,7 @@
CONFIG_QTI_MPM=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_BINDER_IPC_32BIT=y
CONFIG_STM=y
CONFIG_SENSORS_SSC=y
CONFIG_MSM_TZ_LOG=y
diff --git a/arch/arm/configs/msm8909w_defconfig b/arch/arm/configs/msm8909w_defconfig
index 2abc5c0..8351322 100644
--- a/arch/arm/configs/msm8909w_defconfig
+++ b/arch/arm/configs/msm8909w_defconfig
@@ -440,6 +440,7 @@
CONFIG_QTI_MPM=y
CONFIG_ANDROID=y
CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_BINDER_IPC_32BIT=y
CONFIG_SENSORS_SSC=y
CONFIG_MSM_TZ_LOG=y
CONFIG_EXT4_FS=y
diff --git a/arch/arm64/boot/dts/qcom/sdm845-670-usb-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-670-usb-common.dtsi
index 9b88356..c53367a 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-670-usb-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-670-usb-common.dtsi
@@ -141,7 +141,9 @@
0x198 /* PLL_BIAS_CONTROL_2 */
0x228 /* QUSB2PHY_SQ_CTRL1 */
0x22c /* QUSB2PHY_SQ_CTRL2 */
- 0x27c>; /* QUSB2PHY_DEBUG_CTRL1 */
+ 0x27c /* QUSB2PHY_DEBUG_CTRL1 */
+ 0x280 /* QUSB2PHY_DEBUG_CTRL2 */
+ 0x2a0>; /* QUSB2PHY_STAT5 */
qcom,qusb-phy-init-seq =
/* <value reg_offset> */
@@ -431,7 +433,9 @@
0x198 /* PLL_BIAS_CONTROL_2 */
0x228 /* QUSB2PHY_SQ_CTRL1 */
0x22c /* QUSB2PHY_SQ_CTRL2 */
- 0x27c>; /* QUSB2PHY_DEBUG_CTRL1 */
+ 0x27c /* QUSB2PHY_DEBUG_CTRL1 */
+ 0x280 /* QUSB2PHY_DEBUG_CTRL2 */
+ 0x2a0>; /* QUSB2PHY_STAT5 */
qcom,qusb-phy-init-seq =
/* <value reg_offset> */
diff --git a/drivers/android/Kconfig b/drivers/android/Kconfig
index 01de42c..bb2a5b5 100644
--- a/drivers/android/Kconfig
+++ b/drivers/android/Kconfig
@@ -32,9 +32,9 @@
therefore logically separated from the other devices.
config ANDROID_BINDER_IPC_32BIT
- bool
+ bool "Android Binder IPC 32BIT Driver"
depends on !64BIT && ANDROID_BINDER_IPC
- default y
+ default n
---help---
The Binder API has been changed to support both 32 and 64bit
applications in a mixed environment.
diff --git a/drivers/leds/leds-qpnp-wled.c b/drivers/leds/leds-qpnp-wled.c
index 861d987..d272ca6 100644
--- a/drivers/leds/leds-qpnp-wled.c
+++ b/drivers/leds/leds-qpnp-wled.c
@@ -22,6 +22,7 @@
#include <linux/spmi.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
+#include <linux/irq.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/leds-qpnp-wled.h>
@@ -420,6 +421,7 @@
bool prev_state;
bool stepper_en;
bool ovp_irq_disabled;
+ bool secure_mode;
bool auto_calib_enabled;
bool auto_calib_done;
bool module_dis_perm;
@@ -936,6 +938,46 @@
return count;
}
+/* sysfs function for irqs enable/disable */
+static ssize_t qpnp_wled_irq_control(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_wled *wled = dev_get_drvdata(dev);
+ int val, rc;
+
+ rc = kstrtouint(buf, 0, &val);
+ if (rc < 0)
+ return rc;
+
+ if (val != 0 && val != 1)
+ return count;
+
+ mutex_lock(&wled->lock);
+ /* Disable irqs */
+ if (val == 1 && !wled->secure_mode) {
+ if (wled->ovp_irq > 0)
+ disable_irq(wled->ovp_irq);
+
+ if (wled->sc_irq > 0)
+ disable_irq(wled->sc_irq);
+
+ wled->secure_mode = true;
+ } else if (val == 0 && wled->secure_mode) {
+ if (wled->ovp_irq > 0)
+ enable_irq(wled->ovp_irq);
+
+ if (wled->sc_irq > 0)
+ enable_irq(wled->sc_irq);
+
+ wled->secure_mode = false;
+ }
+
+ mutex_unlock(&wled->lock);
+
+ return count;
+}
+
/* sysfs show function for dim mode */
static ssize_t qpnp_wled_dim_mode_show(struct device *dev,
struct device_attribute *attr, char *buf)
@@ -1055,6 +1097,7 @@
__ATTR(ramp_ms, 0664, qpnp_wled_ramp_ms_show, qpnp_wled_ramp_ms_store),
__ATTR(ramp_step, 0664, qpnp_wled_ramp_step_show,
qpnp_wled_ramp_step_store),
+ __ATTR(secure_mode, 0664, NULL, qpnp_wled_irq_control),
};
/* worker for setting wled brightness */
@@ -1066,6 +1109,12 @@
wled = container_of(work, struct qpnp_wled, work);
mutex_lock(&wled->lock);
+
+ if (wled->secure_mode) {
+ pr_debug("Can not set brightness in secure_mode\n ");
+ goto unlock_mutex;
+ }
+
level = wled->cdev.brightness;
if (wled->brt_map_table) {
@@ -2162,6 +2211,7 @@
/* setup ovp and sc irqs */
if (wled->ovp_irq >= 0) {
+ irq_set_status_flags(wled->ovp_irq, IRQ_DISABLE_UNLAZY);
rc = devm_request_threaded_irq(&wled->pdev->dev, wled->ovp_irq,
NULL, qpnp_wled_ovp_irq_handler, IRQF_ONESHOT,
"qpnp_wled_ovp_irq", wled);
@@ -2182,6 +2232,7 @@
if (wled->sc_irq >= 0) {
wled->sc_cnt = 0;
+ irq_set_status_flags(wled->sc_irq, IRQ_DISABLE_UNLAZY);
rc = devm_request_threaded_irq(&wled->pdev->dev, wled->sc_irq,
NULL, qpnp_wled_sc_irq_handler, IRQF_ONESHOT,
"qpnp_wled_sc_irq", wled);
diff --git a/drivers/regulator/qpnp-labibb-regulator.c b/drivers/regulator/qpnp-labibb-regulator.c
index 88c5697..d72af20 100644
--- a/drivers/regulator/qpnp-labibb-regulator.c
+++ b/drivers/regulator/qpnp-labibb-regulator.c
@@ -597,6 +597,7 @@
struct device *dev;
struct platform_device *pdev;
struct regmap *regmap;
+ struct class labibb_class;
struct pmic_revid_data *pmic_rev_id;
u16 lab_base;
u16 ibb_base;
@@ -624,6 +625,8 @@
bool notify_lab_vreg_ok_sts;
bool detect_lab_sc;
bool sc_detected;
+ /* Tracks the secure UI mode entry/exit */
+ bool secure_mode;
u32 swire_2nd_cmd_delay;
u32 swire_ibb_ps_enable_delay;
};
@@ -2463,6 +2466,9 @@
int rc;
struct qpnp_labibb *labibb = rdev_get_drvdata(rdev);
+ if (labibb->secure_mode)
+ return 0;
+
if (labibb->sc_detected) {
pr_info("Short circuit detected: disabled LAB/IBB rails\n");
return 0;
@@ -2500,6 +2506,9 @@
u8 val;
struct qpnp_labibb *labibb = rdev_get_drvdata(rdev);
+ if (labibb->secure_mode)
+ return 0;
+
if (labibb->lab_vreg.vreg_enabled && !labibb->swire_control) {
if (!labibb->standalone)
@@ -2693,7 +2702,7 @@
u8 val;
struct qpnp_labibb *labibb = rdev_get_drvdata(rdev);
- if (labibb->swire_control)
+ if (labibb->swire_control || labibb->secure_mode)
return 0;
if (min_uV < labibb->lab_vreg.min_volt) {
@@ -3072,6 +3081,8 @@
}
if (is_lab_vreg_ok_irq_available(labibb)) {
+ irq_set_status_flags(labibb->lab_vreg.lab_vreg_ok_irq,
+ IRQ_DISABLE_UNLAZY);
rc = devm_request_threaded_irq(labibb->dev,
labibb->lab_vreg.lab_vreg_ok_irq, NULL,
lab_vreg_ok_handler,
@@ -3085,6 +3096,8 @@
}
if (labibb->lab_vreg.lab_sc_irq != -EINVAL) {
+ irq_set_status_flags(labibb->lab_vreg.lab_sc_irq,
+ IRQ_DISABLE_UNLAZY);
rc = devm_request_threaded_irq(labibb->dev,
labibb->lab_vreg.lab_sc_irq, NULL,
labibb_sc_err_handler,
@@ -3568,6 +3581,9 @@
int rc = 0;
struct qpnp_labibb *labibb = rdev_get_drvdata(rdev);
+ if (labibb->secure_mode)
+ return 0;
+
if (labibb->sc_detected) {
pr_info("Short circuit detected: disabled LAB/IBB rails\n");
return 0;
@@ -3593,6 +3609,9 @@
int rc;
struct qpnp_labibb *labibb = rdev_get_drvdata(rdev);
+ if (labibb->secure_mode)
+ return 0;
+
if (labibb->ibb_vreg.vreg_enabled && !labibb->swire_control) {
if (!labibb->standalone)
@@ -3626,7 +3645,7 @@
struct qpnp_labibb *labibb = rdev_get_drvdata(rdev);
- if (labibb->swire_control)
+ if (labibb->swire_control || labibb->secure_mode)
return 0;
rc = labibb->ibb_ver_ops->set_voltage(labibb, min_uV, max_uV);
@@ -3855,6 +3874,8 @@
}
if (labibb->ibb_vreg.ibb_sc_irq != -EINVAL) {
+ irq_set_status_flags(labibb->ibb_vreg.ibb_sc_irq,
+ IRQ_DISABLE_UNLAZY);
rc = devm_request_threaded_irq(labibb->dev,
labibb->ibb_vreg.ibb_sc_irq, NULL,
labibb_sc_err_handler,
@@ -4016,6 +4037,49 @@
return rc;
}
+static ssize_t qpnp_labibb_irq_control(struct class *c,
+ struct class_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct qpnp_labibb *labibb = container_of(c, struct qpnp_labibb,
+ labibb_class);
+ int val, rc;
+
+ rc = kstrtouint(buf, 0, &val);
+ if (rc < 0)
+ return rc;
+
+ if (val != 0 && val != 1)
+ return count;
+
+ /* Disable irqs */
+ if (val == 1 && !labibb->secure_mode) {
+ if (labibb->lab_vreg.lab_vreg_ok_irq > 0)
+ disable_irq(labibb->lab_vreg.lab_vreg_ok_irq);
+ if (labibb->lab_vreg.lab_sc_irq > 0)
+ disable_irq(labibb->lab_vreg.lab_sc_irq);
+ if (labibb->ibb_vreg.ibb_sc_irq > 0)
+ disable_irq(labibb->ibb_vreg.ibb_sc_irq);
+ labibb->secure_mode = true;
+ } else if (val == 0 && labibb->secure_mode) {
+ if (labibb->lab_vreg.lab_vreg_ok_irq > 0)
+ enable_irq(labibb->lab_vreg.lab_vreg_ok_irq);
+ if (labibb->lab_vreg.lab_sc_irq > 0)
+ enable_irq(labibb->lab_vreg.lab_sc_irq);
+ if (labibb->ibb_vreg.ibb_sc_irq > 0)
+ enable_irq(labibb->ibb_vreg.ibb_sc_irq);
+ labibb->secure_mode = false;
+ }
+
+ return count;
+}
+
+static struct class_attribute labibb_attributes[] = {
+ [0] = __ATTR(secure_mode, 0664, NULL,
+ qpnp_labibb_irq_control),
+ __ATTR_NULL,
+};
+
static int qpnp_labibb_regulator_probe(struct platform_device *pdev)
{
struct qpnp_labibb *labibb;
@@ -4208,6 +4272,17 @@
CLOCK_MONOTONIC, HRTIMER_MODE_REL);
labibb->sc_err_check_timer.function = labibb_check_sc_err_count;
dev_set_drvdata(&pdev->dev, labibb);
+
+ labibb->labibb_class.name = "lcd_bias";
+ labibb->labibb_class.owner = THIS_MODULE;
+ labibb->labibb_class.class_attrs = labibb_attributes;
+
+ rc = class_register(&labibb->labibb_class);
+ if (rc < 0) {
+ pr_err("Failed to register labibb class rc=%d\n", rc);
+ return rc;
+ }
+
pr_info("LAB/IBB registered successfully, lab_vreg enable=%d ibb_vreg enable=%d swire_control=%d\n",
labibb->lab_vreg.vreg_enabled,
labibb->ibb_vreg.vreg_enabled,
diff --git a/drivers/usb/phy/phy-msm-qusb-v2.c b/drivers/usb/phy/phy-msm-qusb-v2.c
index 6dfca9c..a17974c 100644
--- a/drivers/usb/phy/phy-msm-qusb-v2.c
+++ b/drivers/usb/phy/phy-msm-qusb-v2.c
@@ -76,6 +76,12 @@
/* PERIPH_SS_PHY_REFGEN_NORTH_BG_CTRL register bits */
#define BANDGAP_BYPASS BIT(0)
+/* DEBUG_CTRL2 register value to program VSTATUS MUX for PHY status */
+#define DEBUG_CTRL2_MUX_PLL_LOCK_STATUS 0x4
+
+/* STAT5 register bits */
+#define VSTATUS_PLL_LOCK_STATUS_MASK BIT(0)
+
enum qusb_phy_reg {
PORT_TUNE1,
PLL_COMMON_STATUS_ONE,
@@ -87,6 +93,8 @@
SQ_CTRL1,
SQ_CTRL2,
DEBUG_CTRL1,
+ DEBUG_CTRL2,
+ STAT5,
USB2_PHY_REG_MAX,
};
@@ -470,6 +478,18 @@
__func__);
}
+static bool qusb_phy_pll_locked(struct qusb_phy *qphy)
+{
+ u32 val;
+
+ writel_relaxed(DEBUG_CTRL2_MUX_PLL_LOCK_STATUS,
+ qphy->base + qphy->phy_reg[DEBUG_CTRL2]);
+
+ val = readl_relaxed(qphy->base + qphy->phy_reg[STAT5]);
+
+ return (val & VSTATUS_PLL_LOCK_STATUS_MASK);
+}
+
static void qusb_phy_host_init(struct usb_phy *phy)
{
u8 reg;
@@ -748,18 +768,12 @@
writel_relaxed(intr_mask,
qphy->base + qphy->phy_reg[INTR_CTRL]);
- /* hold core PLL into reset */
- writel_relaxed(CORE_PLL_EN_FROM_RESET |
- CORE_RESET | CORE_RESET_MUX,
- qphy->base +
- qphy->phy_reg[PLL_CORE_INPUT_OVERRIDE]);
-
if (linestate & (LINESTATE_DP | LINESTATE_DM)) {
/* enable phy auto-resume */
writel_relaxed(0x91,
qphy->base + qphy->phy_reg[TEST1]);
- /* flush the previous write before next write */
- wmb();
+ /* Delay recommended between TEST1 writes */
+ usleep_range(10, 20);
writel_relaxed(0x90,
qphy->base + qphy->phy_reg[TEST1]);
}
@@ -788,12 +802,26 @@
writel_relaxed(0x00,
qphy->base + qphy->phy_reg[INTR_CTRL]);
- /* bring core PLL out of reset */
- writel_relaxed(CORE_PLL_EN_FROM_RESET, qphy->base +
- qphy->phy_reg[PLL_CORE_INPUT_OVERRIDE]);
+ /* Reset PLL if needed */
+ if (!qusb_phy_pll_locked(qphy)) {
+ dev_dbg(phy->dev, "%s: reset PLL\n", __func__);
+ /* hold core PLL into reset */
+ writel_relaxed(CORE_PLL_EN_FROM_RESET |
+ CORE_RESET | CORE_RESET_MUX,
+ qphy->base +
+ qphy->phy_reg[PLL_CORE_INPUT_OVERRIDE]);
- /* Makes sure that above write goes through */
- wmb();
+ /* Wait for PLL to get reset */
+ usleep_range(10, 20);
+
+ /* bring core PLL out of reset */
+ writel_relaxed(CORE_PLL_EN_FROM_RESET,
+ qphy->base +
+ qphy->phy_reg[PLL_CORE_INPUT_OVERRIDE]);
+
+ /* Makes sure that above write goes through */
+ wmb();
+ }
} else { /* Cable connect case */
qusb_phy_enable_clocks(qphy, true);
}