drm/msm: support multiple address spaces
We can have various combinations of 64b and 32b address space, ie. 64b
CPU but 32b display and gpu, or 64b CPU and GPU but 32b display. So
best to decouple the device iova's from mmap offset.
CRs-Fixed: 2050484
Change-Id: Ic0dedbad2b36b535df3e8fb2ddddc20add592cea
Signed-off-by: Rob Clark <robdclark@gmail.com>
Git-commit: 22877bcbdacd50d076f9b2f829e6a3753aa9821f
Git-repo: https://github.com/freedreno/kernel-msm.git
[jcrouse@codeaurora.org: Fix merge conflicts, remove mdp5 due to large
infrastructure changes, compile fixes]
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
[kabhijit@codeaurora.org: Fix merge conflicts, add support for SDE,
compile fixes]
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 86fec8b..31aadaf 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -61,6 +61,8 @@
struct msm_gem_submit;
struct msm_fence_context;
struct msm_fence_cb;
+struct msm_gem_address_space;
+struct msm_gem_vma;
#define NUM_DOMAINS 4 /* one for KMS, then one per gpu core (?) */
#define MAX_CRTCS 8
@@ -528,9 +530,13 @@
uint32_t pending_crtcs;
wait_queue_head_t pending_crtcs_event;
- /* registered MMUs: */
- unsigned int num_mmus;
- struct msm_mmu *mmus[NUM_DOMAINS];
+ /* Registered address spaces.. currently this is fixed per # of
+ * iommu's. Ie. one for display block and one for gpu block.
+ * Eventually, to do per-process gpu pagetables, we'll want one
+ * of these per-process.
+ */
+ unsigned int num_aspaces;
+ struct msm_gem_address_space *aspace[NUM_DOMAINS];
unsigned int num_planes;
struct drm_plane *planes[MAX_PLANES];
@@ -635,10 +641,27 @@
int msm_atomic_commit(struct drm_device *dev,
struct drm_atomic_state *state, bool nonblock);
-int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu);
-void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu);
-
void msm_gem_submit_free(struct msm_gem_submit *submit);
+static inline int msm_register_mmu(struct drm_device *dev,
+ struct msm_mmu *mmu) {
+ return -ENODEV;
+}
+static inline void msm_unregister_mmu(struct drm_device *dev,
+ struct msm_mmu *mmu) {
+}
+int msm_register_address_space(struct drm_device *dev,
+ struct msm_gem_address_space *aspace);
+
+void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
+ struct msm_gem_vma *vma, struct sg_table *sgt);
+int msm_gem_map_vma(struct msm_gem_address_space *aspace,
+ struct msm_gem_vma *vma, struct sg_table *sgt, int npages);
+
+void msm_gem_address_space_destroy(struct msm_gem_address_space *aspace);
+struct msm_gem_address_space *
+msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
+ const char *name);
+
int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
struct drm_file *file);