Merge "msm: sde: fix mem access of sde rotator regdma ram"
diff --git a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c
index 07e2789..3206844 100644
--- a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c
+++ b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c
@@ -66,35 +66,54 @@
do { \
SDEROT_DBG("SDEREG.W:[%s:0x%X] <= 0x%X\n", #off, (off),\
(u32)(data));\
- *p++ = REGDMA_OP_REGWRITE | \
- ((off) & REGDMA_ADDR_OFFSET_MASK); \
- *p++ = (data); \
+ writel_relaxed_no_log( \
+ (REGDMA_OP_REGWRITE | \
+ ((off) & REGDMA_ADDR_OFFSET_MASK)), \
+ p); \
+ p += sizeof(u32); \
+ writel_relaxed_no_log(data, p); \
+ p += sizeof(u32); \
} while (0)
#define SDE_REGDMA_MODIFY(p, off, mask, data) \
do { \
SDEROT_DBG("SDEREG.M:[%s:0x%X] <= 0x%X\n", #off, (off),\
(u32)(data));\
- *p++ = REGDMA_OP_REGMODIFY | \
- ((off) & REGDMA_ADDR_OFFSET_MASK); \
- *p++ = (mask); \
- *p++ = (data); \
+ writel_relaxed_no_log( \
+ (REGDMA_OP_REGMODIFY | \
+ ((off) & REGDMA_ADDR_OFFSET_MASK)), \
+ p); \
+ p += sizeof(u32); \
+ writel_relaxed_no_log(mask, p); \
+ p += sizeof(u32); \
+ writel_relaxed_no_log(data, p); \
+ p += sizeof(u32); \
} while (0)
#define SDE_REGDMA_BLKWRITE_INC(p, off, len) \
do { \
SDEROT_DBG("SDEREG.B:[%s:0x%X:0x%X]\n", #off, (off),\
(u32)(len));\
- *p++ = REGDMA_OP_BLKWRITE_INC | \
- ((off) & REGDMA_ADDR_OFFSET_MASK); \
- *p++ = (len); \
+ writel_relaxed_no_log( \
+ (REGDMA_OP_BLKWRITE_INC | \
+ ((off) & REGDMA_ADDR_OFFSET_MASK)), \
+ p); \
+ p += sizeof(u32); \
+ writel_relaxed_no_log(len, p); \
+ p += sizeof(u32); \
} while (0)
#define SDE_REGDMA_BLKWRITE_DATA(p, data) \
do { \
SDEROT_DBG("SDEREG.I:[:] <= 0x%X\n", (u32)(data));\
- *(p) = (data); \
- (p)++; \
+ writel_relaxed_no_log(data, p); \
+ p += sizeof(u32); \
+ } while (0)
+
+#define SDE_REGDMA_READ(p, data) \
+ do { \
+ data = readl_relaxed_no_log(p); \
+ p += sizeof(u32); \
} while (0)
/* Macro for directly accessing mapped registers */
@@ -941,7 +960,7 @@
static void sde_hw_rotator_setup_timestamp_packet(
struct sde_hw_rotator_context *ctx, u32 mask, u32 swts)
{
- u32 *wrptr;
+ char __iomem *wrptr;
wrptr = sde_hw_rotator_get_regdma_segment(ctx);
@@ -998,7 +1017,7 @@
struct sde_rot_cdp_params *params)
{
int reg_val;
- u32 *wrptr = sde_hw_rotator_get_regdma_segment(ctx);
+ char __iomem *wrptr = sde_hw_rotator_get_regdma_segment(ctx);
if (!params->enable) {
SDE_REGDMA_WRITE(wrptr, params->offset, 0x0);
@@ -1032,7 +1051,7 @@
static void sde_hw_rotator_setup_qos_lut_wr(struct sde_hw_rotator_context *ctx)
{
struct sde_rot_data_type *mdata = sde_rot_get_mdata();
- u32 *wrptr = sde_hw_rotator_get_regdma_segment(ctx);
+ char __iomem *wrptr = sde_hw_rotator_get_regdma_segment(ctx);
/* Offline rotation setting */
if (!ctx->sbuf_mode) {
@@ -1090,7 +1109,7 @@
static void sde_hw_rotator_setup_qos_lut_rd(struct sde_hw_rotator_context *ctx)
{
struct sde_rot_data_type *mdata = sde_rot_get_mdata();
- u32 *wrptr = sde_hw_rotator_get_regdma_segment(ctx);
+ char __iomem *wrptr = sde_hw_rotator_get_regdma_segment(ctx);
/* Offline rotation setting */
if (!ctx->sbuf_mode) {
@@ -1160,7 +1179,7 @@
struct sde_mdp_data *data;
struct sde_rot_cdp_params cdp_params = {0};
struct sde_rot_data_type *mdata = sde_rot_get_mdata();
- u32 *wrptr;
+ char __iomem *wrptr;
u32 opmode = 0;
u32 chroma_samp = 0;
u32 src_format = 0;
@@ -1381,7 +1400,7 @@
struct sde_rot_data_type *mdata = sde_rot_get_mdata();
struct sde_mdp_format_params *fmt;
struct sde_rot_cdp_params cdp_params = {0};
- u32 *wrptr;
+ char __iomem *wrptr;
u32 pack = 0;
u32 dst_format = 0;
u32 no_partial_writes = 0;
@@ -1578,13 +1597,18 @@
enum sde_rot_queue_prio queue_id)
{
struct sde_hw_rotator *rot = ctx->rot;
- u32 *wrptr;
- u32 *rdptr;
- u8 *addr;
+ char __iomem *wrptr;
+ char __iomem *mem_rdptr;
+ char __iomem *addr;
u32 mask;
+ u32 cmd0, cmd1, cmd2;
u32 blksize;
- rdptr = sde_hw_rotator_get_regdma_segment_base(ctx);
+ /*
+ * when regdma is not using, the regdma segment is just a normal
+ * DRAM, and not an iomem.
+ */
+ mem_rdptr = sde_hw_rotator_get_regdma_segment_base(ctx);
wrptr = sde_hw_rotator_get_regdma_segment(ctx);
if (rot->irq_num >= 0) {
@@ -1602,54 +1626,65 @@
SDEROT_DBG("BEGIN %d\n", ctx->timestamp);
/* Write all command stream to Rotator blocks */
/* Rotator will start right away after command stream finish writing */
- while (rdptr < wrptr) {
- u32 op = REGDMA_OP_MASK & *rdptr;
+ while (mem_rdptr < wrptr) {
+ u32 op = REGDMA_OP_MASK & readl_relaxed_no_log(mem_rdptr);
switch (op) {
case REGDMA_OP_NOP:
SDEROT_DBG("NOP\n");
- rdptr++;
+ mem_rdptr += sizeof(u32);
break;
case REGDMA_OP_REGWRITE:
+ SDE_REGDMA_READ(mem_rdptr, cmd0);
+ SDE_REGDMA_READ(mem_rdptr, cmd1);
SDEROT_DBG("REGW %6.6x %8.8x\n",
- rdptr[0] & REGDMA_ADDR_OFFSET_MASK,
- rdptr[1]);
+ cmd0 & REGDMA_ADDR_OFFSET_MASK,
+ cmd1);
addr = rot->mdss_base +
- (*rdptr++ & REGDMA_ADDR_OFFSET_MASK);
- writel_relaxed(*rdptr++, addr);
+ (cmd0 & REGDMA_ADDR_OFFSET_MASK);
+ writel_relaxed(cmd1, addr);
break;
case REGDMA_OP_REGMODIFY:
+ SDE_REGDMA_READ(mem_rdptr, cmd0);
+ SDE_REGDMA_READ(mem_rdptr, cmd1);
+ SDE_REGDMA_READ(mem_rdptr, cmd2);
SDEROT_DBG("REGM %6.6x %8.8x %8.8x\n",
- rdptr[0] & REGDMA_ADDR_OFFSET_MASK,
- rdptr[1], rdptr[2]);
+ cmd0 & REGDMA_ADDR_OFFSET_MASK,
+ cmd1, cmd2);
addr = rot->mdss_base +
- (*rdptr++ & REGDMA_ADDR_OFFSET_MASK);
- mask = *rdptr++;
- writel_relaxed((readl_relaxed(addr) & mask) | *rdptr++,
+ (cmd0 & REGDMA_ADDR_OFFSET_MASK);
+ mask = cmd1;
+ writel_relaxed((readl_relaxed(addr) & mask) | cmd2,
addr);
break;
case REGDMA_OP_BLKWRITE_SINGLE:
+ SDE_REGDMA_READ(mem_rdptr, cmd0);
+ SDE_REGDMA_READ(mem_rdptr, cmd1);
SDEROT_DBG("BLKWS %6.6x %6.6x\n",
- rdptr[0] & REGDMA_ADDR_OFFSET_MASK,
- rdptr[1]);
+ cmd0 & REGDMA_ADDR_OFFSET_MASK,
+ cmd1);
addr = rot->mdss_base +
- (*rdptr++ & REGDMA_ADDR_OFFSET_MASK);
- blksize = *rdptr++;
+ (cmd0 & REGDMA_ADDR_OFFSET_MASK);
+ blksize = cmd1;
while (blksize--) {
- SDEROT_DBG("DATA %8.8x\n", rdptr[0]);
- writel_relaxed(*rdptr++, addr);
+ SDE_REGDMA_READ(mem_rdptr, cmd0);
+ SDEROT_DBG("DATA %8.8x\n", cmd0);
+ writel_relaxed(cmd0, addr);
}
break;
case REGDMA_OP_BLKWRITE_INC:
+ SDE_REGDMA_READ(mem_rdptr, cmd0);
+ SDE_REGDMA_READ(mem_rdptr, cmd1);
SDEROT_DBG("BLKWI %6.6x %6.6x\n",
- rdptr[0] & REGDMA_ADDR_OFFSET_MASK,
- rdptr[1]);
+ cmd0 & REGDMA_ADDR_OFFSET_MASK,
+ cmd1);
addr = rot->mdss_base +
- (*rdptr++ & REGDMA_ADDR_OFFSET_MASK);
- blksize = *rdptr++;
+ (cmd0 & REGDMA_ADDR_OFFSET_MASK);
+ blksize = cmd1;
while (blksize--) {
- SDEROT_DBG("DATA %8.8x\n", rdptr[0]);
- writel_relaxed(*rdptr++, addr);
+ SDE_REGDMA_READ(mem_rdptr, cmd0);
+ SDEROT_DBG("DATA %8.8x\n", cmd0);
+ writel_relaxed(cmd0, addr);
addr += 4;
}
break;
@@ -1658,7 +1693,7 @@
* Skip data for now for unregonized OP mode
*/
SDEROT_DBG("UNDEFINED\n");
- rdptr++;
+ mem_rdptr += sizeof(u32);
break;
}
}
@@ -1676,11 +1711,11 @@
enum sde_rot_queue_prio queue_id)
{
struct sde_hw_rotator *rot = ctx->rot;
- u32 *wrptr;
+ char __iomem *wrptr;
u32 regdmaSlot;
u32 offset;
- long length;
- long ts_length;
+ u32 length;
+ u32 ts_length;
u32 enableInt;
u32 swts = 0;
u32 mask = 0;
@@ -1699,15 +1734,15 @@
* Start REGDMA with command offset and size
*/
regdmaSlot = sde_hw_rotator_get_regdma_ctxidx(ctx);
- length = ((long)wrptr - (long)ctx->regdma_base) / 4;
- offset = (u32)(ctx->regdma_base - (u32 *)(rot->mdss_base +
- REGDMA_RAM_REGDMA_CMD_RAM));
+ length = (wrptr - ctx->regdma_base) / 4;
+ offset = (ctx->regdma_base - (rot->mdss_base +
+ REGDMA_RAM_REGDMA_CMD_RAM)) / sizeof(u32);
enableInt = ((ctx->timestamp & 1) + 1) << 30;
trig_sel = ctx->sbuf_mode ? REGDMA_CMD_TRIG_SEL_MDP_FLUSH :
REGDMA_CMD_TRIG_SEL_SW_START;
SDEROT_DBG(
- "regdma(%d)[%d] <== INT:0x%X|length:%ld|offset:0x%X, ts:%X\n",
+ "regdma(%d)[%d] <== INT:0x%X|length:%d|offset:0x%X, ts:%X\n",
queue_id, regdmaSlot, enableInt, length, offset,
ctx->timestamp);
@@ -1737,6 +1772,7 @@
sde_hw_rotator_setup_timestamp_packet(ctx, mask, swts);
offset += length;
ts_length = sde_hw_rotator_get_regdma_segment(ctx) - wrptr;
+ ts_length /= sizeof(u32);
WARN_ON((length + ts_length) > SDE_HW_ROT_REGDMA_SEG_SIZE);
/* ensure command packet is issue before the submit command */
@@ -3544,21 +3580,22 @@
/* REGDMA initialization */
if (rot->mode == ROT_REGDMA_OFF) {
for (i = 0; i < SDE_HW_ROT_REGDMA_TOTAL_CTX; i++)
- rot->cmd_wr_ptr[0][i] = &rot->cmd_queue[
- SDE_HW_ROT_REGDMA_SEG_SIZE * i];
+ rot->cmd_wr_ptr[0][i] = (char __iomem *)(
+ &rot->cmd_queue[
+ SDE_HW_ROT_REGDMA_SEG_SIZE * i]);
} else {
for (i = 0; i < SDE_HW_ROT_REGDMA_TOTAL_CTX; i++)
rot->cmd_wr_ptr[ROT_QUEUE_HIGH_PRIORITY][i] =
- (u32 *)(rot->mdss_base +
+ rot->mdss_base +
REGDMA_RAM_REGDMA_CMD_RAM +
- SDE_HW_ROT_REGDMA_SEG_SIZE * 4 * i);
+ SDE_HW_ROT_REGDMA_SEG_SIZE * 4 * i;
for (i = 0; i < SDE_HW_ROT_REGDMA_TOTAL_CTX; i++)
rot->cmd_wr_ptr[ROT_QUEUE_LOW_PRIORITY][i] =
- (u32 *)(rot->mdss_base +
+ rot->mdss_base +
REGDMA_RAM_REGDMA_CMD_RAM +
SDE_HW_ROT_REGDMA_SEG_SIZE * 4 *
- (i + SDE_HW_ROT_REGDMA_TOTAL_CTX));
+ (i + SDE_HW_ROT_REGDMA_TOTAL_CTX);
}
for (i = 0; i < ROT_QUEUE_MAX; i++) {
diff --git a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_internal.h b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_internal.h
index 4c1316c..8b391ea 100644
--- a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_internal.h
+++ b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_internal.h
@@ -218,8 +218,8 @@
enum sde_rot_queue_prio q_id;
u32 session_id;
u32 sequence_id;
- u32 *regdma_base;
- u32 *regdma_wrptr;
+ char __iomem *regdma_base;
+ char __iomem *regdma_wrptr;
u32 timestamp;
struct completion rot_comp;
wait_queue_head_t regdma_waitq;
@@ -280,7 +280,7 @@
u32 cmd_queue[SDE_HW_ROT_REGDMA_RAM_SIZE];
/* Cmd Queue Write Ptr */
- u32 *cmd_wr_ptr[ROT_QUEUE_MAX][SDE_HW_ROT_REGDMA_TOTAL_CTX];
+ char __iomem *cmd_wr_ptr[ROT_QUEUE_MAX][SDE_HW_ROT_REGDMA_TOTAL_CTX];
/* Rotator Context */
struct sde_hw_rotator_context
@@ -349,7 +349,7 @@
* @ctx: Rotator Context
* return: base segment address
*/
-static inline u32 *sde_hw_rotator_get_regdma_segment_base(
+static inline char __iomem *sde_hw_rotator_get_regdma_segment_base(
struct sde_hw_rotator_context *ctx)
{
SDEROT_DBG("regdma base @slot[%d]: %p\n",
@@ -365,11 +365,11 @@
* @ctx: Rotator Context
* return: segment address
*/
-static inline u32 *sde_hw_rotator_get_regdma_segment(
+static inline char __iomem *sde_hw_rotator_get_regdma_segment(
struct sde_hw_rotator_context *ctx)
{
u32 idx = sde_hw_rotator_get_regdma_ctxidx(ctx);
- u32 *addr = ctx->regdma_wrptr;
+ char __iomem *addr = ctx->regdma_wrptr;
SDEROT_DBG("regdma slot[%d] ==> %p\n", idx, addr);
return addr;
@@ -383,7 +383,7 @@
*/
static inline void sde_hw_rotator_put_regdma_segment(
struct sde_hw_rotator_context *ctx,
- u32 *wrptr)
+ char __iomem *wrptr)
{
u32 idx = sde_hw_rotator_get_regdma_ctxidx(ctx);