ARM: dts: msm: Connect CTI trig to GPIO on SDM845
Add device tree changes to connect CTI trigout to GPIO node.
Change-Id: I09bc5832a3f2582cb2cd7ba4e2fcb96f107238a2
Signed-off-by: Satyajit Desai <sadesai@codeaurora.org>
diff --git a/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi b/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi
index 1d471f5..0a87847 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi
@@ -1341,6 +1341,10 @@
clocks = <&clock_aop QDSS_CLK>;
clock-names = "apb_pclk";
+
+ qcom,cti-gpio-trigout = <4>;
+ pinctrl-names = "cti-trigout-pctrl";
+ pinctrl-0 = <&trigout_a>;
};
cti3: cti@6013000 {
diff --git a/arch/arm64/boot/dts/qcom/sdm845-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/sdm845-pinctrl.dtsi
index d6af58b..bc535d1 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-pinctrl.dtsi
@@ -2558,6 +2558,18 @@
drive-strength = <2>; /* 2 MA */
};
};
+
+ trigout_a: trigout_a {
+ mux {
+ pins = "gpio62", "gpio51";
+ function = "qdss_cti";
+ };
+ config {
+ pins = "gpio62", "gpio51";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
};
};