tree e8f3d3e1bb158e0c099a680912764e8ca820c5f7
parent 94bb489c89c4ca7dc36bfbe50e77f26d8458e347
author Imre Deak <imre.deak@intel.com> 1465825472 +0300
committer Imre Deak <imre.deak@intel.com> 1465832768 +0300

drm/i915/bxt: Wait for PHY1 GRC calibration synchronously

A follow-up patch moves the PHY enabling to the power well code where
enabling/disabling the PHYs will happen independently. Because of this
waiting for the GRC calibration in PHY1 asynchronously would need some
additional logic. Instead of adding that let's keep things simple for now
and wait synchronously. My measurements showed that the calibration
takes ~4ms.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>