commit e7958bb90d57f0da073cbd031a1808de51d1de15
author Ralf Baechle <ralf@linux-mips.org> Thu Dec 08 13:00:20 2005 +0000
committer <ralf@denk.linux-mips.net> Tue Jan 10 13:39:06 2006 +0000
tree b4f0d57ab157c64ce23722dbd29864901794a019
parent 571e0bed85470882cedfb100e847902911c3f4d2

MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

arch/mips/kernel/cpu-probe.c

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 5e1b08b..d00f876 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -447,10 +447,10 @@
 	isa = (config0 & MIPS_CONF_AT) >> 13;
 	switch (isa) {
 	case 0:
-		c->isa_level = MIPS_CPU_ISA_M32;
+		c->isa_level = MIPS_CPU_ISA_M32R1;
 		break;
 	case 2:
-		c->isa_level = MIPS_CPU_ISA_M64;
+		c->isa_level = MIPS_CPU_ISA_M64R1;
 		break;
 	default:
 		panic("Unsupported ISA type, cp0.config0.at: %d.", isa);
@@ -568,7 +568,7 @@
 		break;
 	case PRID_IMP_34K:
 		c->cputype = CPU_34K;
-		c->isa_level = MIPS_CPU_ISA_M32;
+		c->isa_level = MIPS_CPU_ISA_M32R1;
 		break;
 	}
 }
@@ -647,7 +647,7 @@
 	switch (c->processor_id & 0xff00) {
 	case PRID_IMP_PR4450:
 		c->cputype = CPU_PR4450;
-		c->isa_level = MIPS_CPU_ISA_M32;
+		c->isa_level = MIPS_CPU_ISA_M32R1;
 		break;
 	default:
 		panic("Unknown Philips Core!"); /* REVISIT: die? */
@@ -690,8 +690,8 @@
 	if (c->options & MIPS_CPU_FPU) {
 		c->fpu_id = cpu_get_fpu_id();
 
-		if (c->isa_level == MIPS_CPU_ISA_M32 ||
-		    c->isa_level == MIPS_CPU_ISA_M64) {
+		if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
+		    c->isa_level == MIPS_CPU_ISA_M64R1) {
 			if (c->fpu_id & MIPS_FPIR_3D)
 				c->ases |= MIPS_ASE_MIPS3D;
 		}