| commit | ea5671bffbb2b6eefdce7e467a162ae2eef032ac | [log] [tgz] |
|---|---|---|
| author | Chen-Yu Tsai <wens@csie.org> | Thu Jun 26 23:55:42 2014 +0800 |
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | Fri Jul 04 12:05:13 2014 +0200 |
| tree | dd3d35bcbe814cdb2d311921ee4b6a78d8747ea0 | |
| parent | 9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1 [diff] |
clk: sunxi: Add support for table-based divider clocks A few of the clock modules have odd dividers, such as the 2 lowest dividers being the same (2), or have the same divider when the highest bit is set. This patch adds support for optional divider tables, so the clock framework will know about the odd values. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>