msm: kgsl: Set GPU fence to ALLOW mode for gmu snapshot
Without fence in ALLOW mode, some GPU registers cannot be
accessed by snapshot functions.
Change-Id: I7118e2683121cb9845b8c93a0181ba3573b473f6
Signed-off-by: George Shen <sqiao@codeaurora.org>
diff --git a/drivers/gpu/msm/adreno_a6xx_snapshot.c b/drivers/gpu/msm/adreno_a6xx_snapshot.c
index e865f20..4357518 100644
--- a/drivers/gpu/msm/adreno_a6xx_snapshot.c
+++ b/drivers/gpu/msm/adreno_a6xx_snapshot.c
@@ -1481,6 +1481,7 @@
{
struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);
+ unsigned int val;
if (!kgsl_gmu_isenabled(device))
return;
@@ -1488,10 +1489,16 @@
adreno_snapshot_registers(device, snapshot, a6xx_gmu_registers,
ARRAY_SIZE(a6xx_gmu_registers) / 2);
- if (gpudev->gx_is_on(adreno_dev))
+ if (gpudev->gx_is_on(adreno_dev)) {
+ /* Set fence to ALLOW mode so registers can be read */
+ kgsl_regwrite(device, A6XX_GMU_AO_AHB_FENCE_CTRL, 0);
+ kgsl_regread(device, A6XX_GMU_AO_AHB_FENCE_CTRL, &val);
+
+ KGSL_DRV_ERR(device, "set FENCE to ALLOW mode:%x\n", val);
adreno_snapshot_registers(device, snapshot,
a6xx_gmu_gx_registers,
ARRAY_SIZE(a6xx_gmu_gx_registers) / 2);
+ }
}
/* a6xx_snapshot_sqe() - Dump SQE data in snapshot */
@@ -1579,9 +1586,6 @@
bool sptprac_on;
unsigned int i;
- /* Make sure the fence is in ALLOW mode so registers can be read */
- kgsl_regwrite(device, A6XX_GMU_AO_AHB_FENCE_CTRL, 0);
-
/* GMU TCM data dumped through AHB */
a6xx_snapshot_gmu(adreno_dev, snapshot);